timer.c

samsung 最新芯片2450 的测试程序.

    rINTPND = BIT_TIMER4;
    rINTPND;
    variable4++;    
}

/******************** Timer DMA Request Test ********************/										
void Test_TimerDma(void)
{
    int i;
    
    rTCFG0 = rTCFG0 & ~(0xffffff) | 0x0; //Dead zone=0, Prescaler0,1 = 0    
    rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 0 | 0x1 << 20; //Mux0 1/16, DMA Request Channel 0
    
    rTCNTB0 = 65500;   
  	rTCMPB0 = 30000;
  	
  	rTCNTB1 = 65500;   
  	rTCMPB1 = 30000;
  	
  	rTCNTB2 = 65500;   
  	rTCMPB2 = 30000;
  	
  	rTCNTB3 = 65500;   
  	rTCMPB3 = 30000;
  	
  	rTCNTB4 = 65500;   
  	
  	rTCON  = rTCON & ~(0xffffff) | 0x1<<1 | 0x1<<9 | 0x1<<13 | 0x1<<17 | 0x1<<21 ; //Manual update 
  	
  	printf("\nTimer 0 DMA Request Test\n\n");
  	
  	rTCON = 0x1 | 0x1<<3; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	DMA_M2M(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
	rTCON  = 0x0; //Timer Stop

	printf("\nTimer 1 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 4 | 0x2 << 20; //Mux0 1/16, DMA Request Channel 2
  	rTCON = 0x1<<8 | 0x1<<11; //Auto reload, Start
  	for(i=0 ; i < 4 ; i++) 
   	DMA_M2M(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
	rTCON  = 0x0; 
	
	printf("\nTimer 2 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 8 | 0x3 << 20; //Mux0 1/16, DMA Request Channel 3
  	rTCON = 0x1<<12 | 0x1<<15; //Auto reload, Start
  	for(i=0 ; i < 4 ; i++) 
   	DMA_M2M(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
	rTCON  = 0x0; 

	printf("\nTimer 3 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 12 | 0x4 << 20; //Mux0 1/16, DMA Request Channel 0
  	rTCON = 0x1<<16 | 0x1<<19; //Auto reload, Start
  	for(i=0 ; i < 4 ; i++) 
   	DMA_M2M(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
	rTCON  = 0x0; 

	printf("\nTimer 4 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 16 | 0x5 << 20; //Mux0 1/16, DMA Request Channel 2
  	rTCON = 0x1<<20 | 0x1<<22; //Auto reload, Start
  	for(i=0 ; i < 4 ; i++) 
   	DMA_M2M(4,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
	rTCON  = 0x0;
	
	printf("Press any key\n");      
	while(!getchar());       //Key board press check      

}

/***** Memory to Memory DMA Service Routine *****/
void DMA_M2M(int ch,int srcAddr,int dstAddr,int tc,int dsz,int burst)
{
    int i;
    volatile U32 memSum0=0,memSum1=0;
    DMA *pDMA = NULL; //Pointer for DMA Special Register Structure 
    int length;
    
    length=tc*(burst ? 4:1)*((dsz==0)+(dsz==1)*2+(dsz==2)*4); //total data size(byte address)
    //     Counter value * burst size * data size     
    
    printf("[DMA%d MEM2MEM Test]\n",ch);

    switch(ch)
    {
    case 0:
    	pISR_DMA=(int)Dma0Done; //DMA0 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA0);
    	rINTMSK&=~(BIT_DMA);    //DMA0 interrupt Enable
    	pDMA=(void *)0x4b000000; //pDMA ponter indicate first addr. of DMA0 Special Register 
    	break;
    case 1:
    	pISR_DMA=(int)Dma1Done; //DMA1 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA1);
    	rINTMSK&=~(BIT_DMA);  
    	pDMA=(void *)0x4b000100;
    	break;
    case 2:
		pISR_DMA=(int)Dma2Done; //DMA2 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA2);
    	rINTMSK&=~(BIT_DMA);  
    	pDMA=(void *)0x4b000200;
		break;
    case 3:
        pISR_DMA=(int)Dma3Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA3);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000300;
        break;
    case 4:
        pISR_DMA=(int)Dma4Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA4);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000400;
        break;
    case 5:
        pISR_DMA=(int)Dma5Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA5);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000500;
        break;
    }
                                                                                                                            
    printf("DMA%d %8xh->%8xh,size=%xh(tc=%xh),dsz=%d,burst=%d\n",ch,srcAddr,dstAddr,length,tc,dsz,burst);

    printf("Initialize the src.\n");
    
    for(i=srcAddr;i<(srcAddr+length);i+=4)
    {
    	*((U32 *)i)=i^0x55aa5aa5;
    	memSum0+=i^0x55aa5aa5;
    }

    
    printf("DMA%d start\n",ch);
    
    dmaDone=0;
    
    /* Value Setting of Current DMA Special Registers */
    pDMA->DISRC=srcAddr;
    pDMA->DISRCC=(0<<1)|(0<<0); //inc,AHB
    pDMA->DIDST=dstAddr;
    pDMA->DIDSTC=(0<<1)|(0<<0); //inc,AHB
    
    pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(burst<<28)|(1<<27)|(1<<22)|(dsz<<20)|(tc);
    //HS,AHB,TC interrupt,whole, HWSource request mode,relaod off
    pDMA->DMAREQSEL=(0x9<<1)|(1<<0);
    
    
    pDMA->DMASKTRIG= 0x1<<1; //DMA on,
	
	/* DMA Start */
//    Timer_Start(3);//128us resolution	      
    
    while(dmaDone==0);
    
//    time=Timer_Stop();
    
//    printf("DMA transfer done. time=%f, %fMB/S\n",(float)time/ONESEC3, length/((float)time/ONESEC3)/1000000.);
    
    rINTMSK=BIT_ALLMSK;
    
    /* Check DMA Result */
    for(i=dstAddr;i<dstAddr+length;i+=4)
    {
    	memSum1+=*((U32 *)i)=i^0x55aa5aa5;
    }
    
    printf("memSum0=%x,memSum1=%x\n",memSum0,memSum1);
    if(memSum0==memSum1)
    	printf("DMA test result--------------------------------------O.K.\n");
    else 
    	printf("DMA test result--------------------------------------ERROR!!!\n");
}

/***** DMA Interrupt Service Routine *****/ 
static void __irq Dma0Done(void)
{
    rSUBSRCPND|=BIT_SUB_DMA0;
    ClearPending(BIT_DMA);
    dmaDone=1;
}

static void __irq Dma1Done(void)
{
	rSUBSRCPND|=BIT_SUB_DMA1;
    ClearPending(BIT_DMA);
    dmaDone=1;
}

static void __irq Dma2Done(void)
{
	rSUBSRCPND|=BIT_SUB_DMA2;
    ClearPending(BIT_DMA);
    dmaDone=1;
}

static void __irq Dma3Done(void)
{
	rSUBSRCPND|=BIT_SUB_DMA3;
    ClearPending(BIT_DMA);
    dmaDone=1;
}

static void __irq Dma4Done(void)
{
	rSUBSRCPND|=BIT_SUB_DMA4;
    ClearPending(BIT_DMA);
    dmaDone=1;
}

static void __irq Dma5Done(void)
{
	rSUBSRCPND|=BIT_SUB_DMA5;
    ClearPending(BIT_DMA);
    dmaDone=1;
}




/////////////////////////////////////////////////
// autotest
//


/***** Memory to Memory DMA Service Routine *****/
bool DMA_M2M_autotest(int ch,int srcAddr,int dstAddr,int tc,int dsz,int burst)
{
    int i;
    volatile U32 memSum0=0,memSum1=0;
    DMA *pDMA = NULL; //Pointer for DMA Special Register Structure 
    int length;
    
    length=tc*(burst ? 4:1)*((dsz==0)+(dsz==1)*2+(dsz==2)*4); //total data size(byte address)
    //     Counter value * burst size * data size     
    
    printf("[DMA%d MEM2MEM Test]\n",ch);

    switch(ch)
    {
    case 0:
    	pISR_DMA=(int)Dma0Done; //DMA0 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA0);
    	rINTMSK&=~(BIT_DMA);    //DMA0 interrupt Enable
    	pDMA=(void *)0x4b000000; //pDMA ponter indicate first addr. of DMA0 Special Register 
    	break;
    case 1:
    	pISR_DMA=(int)Dma1Done; //DMA1 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA1);
    	rINTMSK&=~(BIT_DMA);  
    	pDMA=(void *)0x4b000100;
    	break;
    case 2:
		pISR_DMA=(int)Dma2Done; //DMA2 interrupt Vector Table Initialzation
    	rINTSUBMSK=~(BIT_SUB_DMA2);
    	rINTMSK&=~(BIT_DMA);  
    	pDMA=(void *)0x4b000200;
		break;
    case 3:
        pISR_DMA=(int)Dma3Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA3);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000300;
        break;
    case 4:
        pISR_DMA=(int)Dma4Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA4);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000400;
        break;
    case 5:
        pISR_DMA=(int)Dma5Done; //DMA3 interrupt Vector Table Initialzation
       	rINTSUBMSK=~(BIT_SUB_DMA5);
       	rINTMSK&=~(BIT_DMA);  
       	pDMA=(void *)0x4b000500;
        break;
    }
                                                                                                                            
    printf("DMA%d %8xh->%8xh,size=%xh(tc=%xh),dsz=%d,burst=%d\n",ch,srcAddr,dstAddr,length,tc,dsz,burst);

    printf("Initialize the src.\n");
    
    for(i=srcAddr;i<(srcAddr+length);i+=4)
    {
    	*((U32 *)i)=i^0x55aa5aa5;
    	memSum0+=i^0x55aa5aa5;
    }

    
    printf("DMA%d start\n",ch);
    
    dmaDone=0;
    
    /* Value Setting of Current DMA Special Registers */
    pDMA->DISRC=srcAddr;
    pDMA->DISRCC=(0<<1)|(0<<0); //inc,AHB
    pDMA->DIDST=dstAddr;
    pDMA->DIDSTC=(0<<1)|(0<<0); //inc,AHB
    
    pDMA->DCON=(1<<31)|(1<<30)|(1<<29)|(burst<<28)|(1<<27)|(1<<22)|(dsz<<20)|(tc);
    //HS,AHB,TC interrupt,whole, HWSource request mode,relaod off
    pDMA->DMAREQSEL=(0x9<<1)|(1<<0);
    
    
    pDMA->DMASKTRIG= 0x1<<1; //DMA on,
	
	/* DMA Start */
    
    while(dmaDone==0);  
  
    rINTMSK=BIT_ALLMSK;
    
    /* Check DMA Result */
    for(i=dstAddr;i<dstAddr+length;i+=4)
    {
    	memSum1+=*((U32 *)i)=i^0x55aa5aa5;
    }
    
    printf("memSum0=%x,memSum1=%x\n",memSum0,memSum1);
    if(memSum0==memSum1) 
    {
    	printf("DMA test result--------------------------------------O.K.\n");
    	return true; 
    }
    else
    {
    	printf("DMA test result--------------------------------------ERROR!!!\n");
    	return false;
    }
    
}

bool PWM_DMA_auto_fulltest(void)
{
   int i;
   
   bool bTmp;
   int f=0;
    
    rTCFG0 = rTCFG0 & ~(0xffffff) | 0x0; //Dead zone=0, Prescaler0,1 = 0    
    rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 0 | 0x1 << 20; //Mux0 1/16, DMA Request Channel 0
    
    rTCNTB0 = 65500;   
  	rTCMPB0 = 30000;
  	
  	rTCNTB1 = 65500;   
  	rTCMPB1 = 30000;
  	
  	rTCNTB2 = 65500;   
  	rTCMPB2 = 30000;
  	
  	rTCNTB3 = 65500;   
  	rTCMPB3 = 30000;
  	
  	rTCNTB4 = 65500;   
  	
  	rTCON  = rTCON & ~(0xffffff) | 0x1<<1 | 0x1<<9 | 0x1<<13 | 0x1<<17 | 0x1<<21 ; //Manual update 
  	
  	printf("\nTimer 0 DMA Request Test\n\n");
  	
  	rTCON = 0x1 | 0x1<<3; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	{
   		bTmp=DMA_M2M_autotest(0,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
   		if(bTmp != true) f++;
   	}
   	
	rTCON  = 0x0; //Timer Stop


	printf("\nTimer 1 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 4 | 0x2 << 20; //Mux0 1/16, DMA Request Channel 2
  	rTCON = 0x1<<8 | 0x1<<11; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	{
   		bTmp=DMA_M2M_autotest(1,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
   		if(bTmp != true) f++;
   	}
   	
	rTCON  = 0x0; 
	
	printf("\nTimer 2 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 8 | 0x3 << 20; //Mux0 1/16, DMA Request Channel 3
  	rTCON = 0x1<<12 | 0x1<<15; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	{
   		bTmp=DMA_M2M_autotest(2,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
   		if(bTmp != true) f++;
   	}
   		rTCON  = 0x0; 


	printf("\nTimer 3 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 12 | 0x4 << 20; //Mux0 1/16, DMA Request Channel 0
  	rTCON = 0x1<<16 | 0x1<<19; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	{
   		bTmp=DMA_M2M_autotest(3,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
   		if(bTmp != true) f++;
   	}
   	
	rTCON  = 0x0; 

	printf("\nTimer 4 DMA Request Test\n\n");
  	
  	rTCFG1 = rTCFG1 & ~(0xffffff) | 0x3 << 16 | 0x5 << 20; //Mux0 1/16, DMA Request Channel 2
  	rTCON = 0x1<<20 | 0x1<<22; //Auto reload, Start
   	for(i=0 ; i < 4 ; i++)
   	{
   		bTmp=DMA_M2M_autotest(4,_NONCACHE_STARTADDRESS,_NONCACHE_STARTADDRESS+0x800000,0x80000,0,0); //byte,single
   		if(bTmp != true) f++;
   	}
   		rTCON  = 0x0;
	
	printf("Total test fail count #:%d",f);
	
	if(f>0) return false;
	else return true;
}