📄 hs1_mmc.c
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else
{
StartAddr = StartAddr * 512;
printf("\nByte Mode Addressing");
}
// 1. Make a descriptor table
GenerateDescriptor_CH1(&WrDscrpt[0], uSrcAddr, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTEn_CH1);
GenerateLinkerDescriptor_CH1(&WrLinkDscrpt, &WrDscrpt[1]);
GenerateDescriptor_CH1(&WrDscrpt[1], uSrcAddr1, uDataSize, ADMA_END_CH1, ADMA_INTEn_CH1);
GenerateDescriptor_CH1(&RdDscrpt[0], uDstAddr, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTEn_CH1);
GenerateDescriptor_CH1(&RdDscrpt[1], uDstAddr1, uDataSize, ADMA_END_CH1, ADMA_INTEn_CH1);
// 2. Make source data and initialize destination
for ( i=0; i<BlockNum_HSMMC_ch1*128; i++ )
{
((U32 *)uSrcAddr)[i] = rand(); // rand();
((U32 *)uSrcAddr1)[i] = rand(); // rand();
((U32 *)uDstAddr)[i] = 0;
((U32 *)uDstAddr1)[i] = 0;
}
// 5. Writing ADMA mode
pISR_SDI_1 = (unsigned)HS_ADMA_INT_CH1;
rINTMSK &= ~(BIT_SDI1);
rHM1_NORINTSTSEN = (rHM1_NORINTSTSEN & ~(0xffff)) |
BUFFER_READREADY_STS_INT_EN_CH1 |
DMA_STS_INT_EN_CH1 |
TRANSFERCOMPLETE_STS_INT_EN_CH1 |
COMMANDCOMPLETE_STS_INT_EN_CH1;
rHM1_NORINTSIGEN = (rHM1_NORINTSIGEN & ~(0xffff)) | DMA_SIG_INT_EN_CH1 | TRANSFERCOMPLETE_SIG_INT_EN_CH1;
SetADMASystemAddressReg_CH1((U32*)&WrDscrpt[0]);
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1*2); // Block Numbers to Write
SetArgumentReg_CH1(StartAddr);// Card Start Block Address to Write
if (uNumOfBlocks == 1)
{
SetTransferModeReg_CH1(0, 0, 1, 1, 1);
SetCommandReg_CH1(24, 0); // CMD24: Single-Write
}
else
{
SetTransferModeReg_CH1(1, 0, 1, 1, 1);
SetCommandReg_CH1(25, 0); // CMD25: Multi-Write
}
if (!WaitForCommandComplete_CH1())
{
printf("\nCommand is NOT completed\n");
}
ClearCommandCompleteStatus_CH1();
while(!HS_ADMA_END_ch1);
//while(!HS_DESCRIPTOR_INT_ch1);
if(!WaitForTransferComplete_CH1())
{
printf(("Transfer is NOT Complete\n"));
}
ClearTransferCompleteStatus_CH1();
//rHM1_NORINTSTS |= (1<<3);
printf("\nDMA interrupt cnt = %x",HS_DESCRIPTOR_INT_ch1);
printf("\nTransfer Done interrupt cnt = %x",HS_ADMA_END_ch1);
printf(("\nDMA Write End\n"));
printf("Press Any key for Data compare\n");
HS_ADMA_END_ch1=0;
HS_DESCRIPTOR_INT_ch1=0;
Uart_getc();
/*
DataRead_ForCompare_CH1(StartAddr);
DataCompare_HSMMC_CH1(uSrcAddr, uDstAddr, BlockNum_HSMMC_ch1 * 128);
*/
pISR_SDI_1=(unsigned)HS_ADMA_INT_CH1;
rINTMSK &= ~(BIT_SDI1);
rHM1_NORINTSTSEN = (rHM1_NORINTSTSEN & ~(0xffff)) |
BUFFER_READREADY_STS_INT_EN_CH1 |
DMA_STS_INT_EN_CH1 |
TRANSFERCOMPLETE_STS_INT_EN_CH1 |
COMMANDCOMPLETE_STS_INT_EN_CH1;
rHM1_NORINTSIGEN = (rHM1_NORINTSIGEN & ~(0xffff)) | DMA_SIG_INT_EN_CH1 | TRANSFERCOMPLETE_SIG_INT_EN_CH1;
//SetSystemAddressReg_CH1(SDI_Rx_buffer_HSMMC_CH1);// AHB System Address For Write
SetADMASystemAddressReg_CH1((U32*)&RdDscrpt[0]);
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1*2); // Block Numbers to Write
SetArgumentReg_CH1(StartAddr);// Card Start Block Address to Write
if (BlockNum_HSMMC_ch1 == 1)
{
SetTransferModeReg_CH1(0, 1, 0, 1, 1);
SetCommandReg_CH1(17, 0); // CMD17: Single-Read
}
else
{
SetTransferModeReg_CH1(1, 1, 1, 1, 1);
SetCommandReg_CH1(18, 0); // CMD18: Multi-Read
}
if (!WaitForCommandComplete_CH1())
{
printf(("Command NOT Complete\n"));
}
else
ClearCommandCompleteStatus_CH1();
while(!HS_ADMA_END_ch1);
//while(!HS_DESCRIPTOR_INT_ch1);
printf(("\nDMA Read End\n"));
printf("\nDMA interrupt cnt = %x",HS_DESCRIPTOR_INT_ch1);
printf("\nTransfer Done interrupt cnt = %x",HS_ADMA_END_ch1);
DataCompare_HSMMC_CH1(uSrcAddr, uDstAddr, (BlockNum_HSMMC_ch1 * 128));
DataCompare_HSMMC_CH1(uSrcAddr1,uDstAddr1, (BlockNum_HSMMC_ch1 * 128));
HS_ADMA_END_ch1=0;
HS_DESCRIPTOR_INT_ch1=0;
BlockNum_HSMMC_ch1=0;
}
void HS_MMC_ADMA_WriteTest_CH1(void)
{
U32 uSrcAddr;
U32 uDataSize;
U32 uNumOfBlocks;
U32 uSrcAddr1, uSrcAddr2, uSrcAddr3;
U32 StartAddr;
U32 i,j;
U32 uTxBufAddr = SDI_Tx_buffer_HSMMC_CH1;
U32 uCompareBufAddr = SDI_Compare_buffer_HSMMC_CH1;
ADMA_DESC_CH1 WrDscrpt[4];
printf("\nInput Write Start block number : ");
StartAddr = GetIntNum();
printf("Input number of Block [1~65535] : ");
BlockNum_HSMMC_ch1 = GetIntNum();
uDataSize = BlockNum_HSMMC_ch1*512;
uSrcAddr = SDI_Tx_buffer_HSMMC_CH1;
uSrcAddr1 = uSrcAddr + uDataSize;
uSrcAddr2 = uSrcAddr1 + uDataSize;
uSrcAddr3 = uSrcAddr2 + uDataSize;
printf("\nSrcAddr = 0x%x",uSrcAddr);
printf("\nSrcAddr1 = 0x%x",uSrcAddr1);
printf("\nSrcAddr2 = 0x%x",uSrcAddr2);
printf("\nSrcAddr3 = 0x%x",uSrcAddr3);
printf("\n&WrDscrpt[0] = 0x%x",&WrDscrpt[0]);
printf("\n&WrDscrpt[1] = 0x%x",&WrDscrpt[1]);
printf("\n&WrDscrpt[2] = 0x%x",&WrDscrpt[2]);
printf("\n&WrDscrpt[3] = 0x%x",&WrDscrpt[3]);
if(SectorMode_ch1 == 1)
{
StartAddr = StartAddr;
printf("\nSector Mode Addressing");
}
else
{
StartAddr = StartAddr * 512;
printf("\nByte Mode Addressing");
}
// 1. Make a descriptor table
GenerateDescriptor_CH1(&WrDscrpt[0], uSrcAddr, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTDis_CH1);
GenerateDescriptor_CH1(&WrDscrpt[1], uSrcAddr1, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTDis_CH1);
GenerateDescriptor_CH1(&WrDscrpt[2], uSrcAddr2, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTDis_CH1);
GenerateDescriptor_CH1(&WrDscrpt[3], uSrcAddr3, uDataSize, ADMA_END_CH1, ADMA_INTEn_CH1);
// 2. Make source data and initialize destination
for ( i=0; i<BlockNum_HSMMC_ch1*128; i++ )
{
((U32 *)uSrcAddr)[i] = rand();
((U32 *)uSrcAddr1)[i] =rand();
((U32 *)uSrcAddr2)[i] =rand();
((U32 *)uSrcAddr3)[i] =rand();
}
// 5. Writing ADMA mode
pISR_SDI_1 = (unsigned)HS_ADMA_INT_CH1;
rINTMSK &= ~(BIT_SDI1);
rHM1_NORINTSTSEN = (rHM1_NORINTSTSEN & ~(0xffff)) |
DMA_STS_INT_EN_CH1 |
TRANSFERCOMPLETE_STS_INT_EN_CH1 |
COMMANDCOMPLETE_STS_INT_EN_CH1;
rHM1_NORINTSIGEN = (rHM1_NORINTSIGEN & ~(0xffff)) | DMA_SIG_INT_EN_CH1 | TRANSFERCOMPLETE_SIG_INT_EN_CH1;
SetADMASystemAddressReg_CH1((U32*)&WrDscrpt[0]);
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1*4); // Block Numbers to Write
SetArgumentReg_CH1(StartAddr);// Card Start Block Address to Write
if (uNumOfBlocks == 1)
{
SetTransferModeReg_CH1(0, 0, 1, 1, 1);
SetCommandReg_CH1(24, 0); // CMD24: Single-Write
}
else
{
SetTransferModeReg_CH1(1, 0, 1, 1, 1);
SetCommandReg_CH1(25, 0); // CMD25: Multi-Write
}
if (!WaitForCommandComplete_CH1())
{
printf("\nCommand is NOT completed\n");
}
ClearCommandCompleteStatus_CH1();
while(!HS_ADMA_END_ch1);
//while(!HS_DESCRIPTOR_INT_ch1);
if(!WaitForTransferComplete_CH1())
{
printf(("Transfer is NOT Complete\n"));
}
ClearTransferCompleteStatus_CH1();
//rHM1_NORINTSTS |= (1<<3);
printf("\nDMA interrupt cnt = %x",HS_DESCRIPTOR_INT_ch1);
printf("\nTransfer Done interrupt cnt = %x",HS_ADMA_END_ch1);
printf(("\nDMA Write End\n"));
printf("\nPress Any key for Data compare\n");
Uart_getc();
DataRead_ForCompare_ADMA_CH1(StartAddr);
DataCompare_HSMMC_CH1(uTxBufAddr, uCompareBufAddr, (BlockNum_HSMMC_ch1 * 128)*4);
BlockNum_HSMMC_ch1 = 0;
wt_cnt_HSMMC_ch1 = 0;
WriteBlockCnt_INT_ch1 = 0;
HS_DMA_END_ch1 = 0;
BufferBoundary_INT_Cnt_ch1 = 0;
CompareCnt_INT_ch1 = 0;
Compare_buffer_HSMMC_ch1 = 0;
HS_ADMA_END_ch1=0;
HS_DESCRIPTOR_INT_ch1=0;
}
void HS_MMC_ADMA_ReadTest_CH1(void)
{
U32 uSrcAddr;
U32 uDataSize;
U32 uNumOfBlocks;
U32 uSrcAddr1;
U32 uDstAddr;
U32 uDstAddr1,uDstAddr2,uDstAddr3;
U32 StartAddr;
U32 i,j,Addr_temp=0;
U32 uTxBufAddr = SDI_Tx_buffer_HSMMC_CH1;
U32 uCompareBufAddr = SDI_Compare_buffer_HSMMC_CH1;
ADMA_DESC_CH1 RdDscrpt[4];
printf("\nInput Read Start block number : ");
StartAddr = GetIntNum();
printf("Input number of Block [1~65535] : ");
BlockNum_HSMMC_ch1 = GetIntNum();
uDataSize = BlockNum_HSMMC_ch1*512;
uDstAddr = SDI_Rx_buffer_HSMMC_CH1;
uDstAddr1 = uDstAddr + uDataSize;
uDstAddr2 = uDstAddr1 + uDataSize;
uDstAddr3 = uDstAddr2 + uDataSize;
/*
printf("\uDstAddr = 0x%x",uDstAddr);
printf("\uDstAddr1 = 0x%x",uDstAddr1);
printf("\uDstAddr2 = 0x%x",uDstAddr2);
printf("\uDstAddr3 = 0x%x",uDstAddr3);
*/
if(SectorMode_ch1 == 1)
{
StartAddr = StartAddr;
printf("\nSector Mode Addressing");
}
else
{
StartAddr = StartAddr * 512;
printf("\nByte Mode Addressing");
}
// 1. Make a descriptor table
GenerateDescriptor_CH1(&RdDscrpt[0], uDstAddr, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTDis_CH1);
GenerateDescriptor_CH1(&RdDscrpt[1], uDstAddr1, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTEn_CH1);
GenerateDescriptor_CH1(&RdDscrpt[2], uDstAddr2, uDataSize, ADMA_CONTINUE_CH1, ADMA_INTDis_CH1);
GenerateDescriptor_CH1(&RdDscrpt[3], uDstAddr3, uDataSize, ADMA_END_CH1, ADMA_INTEn_CH1);
// 2. Make source data and initialize destination
for ( i=0; i<BlockNum_HSMMC_ch1*128; i++ )
{
((U32 *)uDstAddr)[i] = 0;
((U32 *)uDstAddr1)[i] = 0;
((U32 *)uDstAddr2)[i] = 0;
((U32 *)uDstAddr3)[i] = 0;
}
/*
DataRead_ForCompare_CH1(StartAddr);
DataCompare_HSMMC_CH1(uSrcAddr, uDstAddr, BlockNum_HSMMC_ch1 * 128);
*/
#if 0
pISR_SDI_1=(unsigned)HS_ADMA_INT_CH1;
rINTMSK &= ~(BIT_SDI1);
rHM1_NORINTSTSEN = (rHM1_NORINTSTSEN & ~(0xffff)) |
BUFFER_READREADY_STS_INT_EN_CH1 |
DMA_STS_INT_EN_CH1 |
TRANSFERCOMPLETE_STS_INT_EN_CH1 |
COMMANDCOMPLETE_STS_INT_EN_CH1;
rHM1_NORINTSIGEN = (rHM1_NORINTSIGEN & ~(0xffff)) | DMA_SIG_INT_EN_CH1 | TRANSFERCOMPLETE_SIG_INT_EN_CH1;
#else
pISR_SDI_1=(unsigned)HS_ADMA_INT_CH1;
rINTMSK &= ~(BIT_SDI1);
rHM1_NORINTSTSEN = (rHM1_NORINTSTSEN & ~(0xffff)) |
DMA_STS_INT_EN_CH1 |
TRANSFERCOMPLETE_STS_INT_EN_CH1 |
COMMANDCOMPLETE_STS_INT_EN_CH1;
rHM1_NORINTSIGEN = (rHM1_NORINTSIGEN & ~(0xffff)) | DMA_SIG_INT_EN_CH1 | TRANSFERCOMPLETE_SIG_INT_EN_CH1;
#endif
//SetSystemAddressReg_CH1(SDI_Rx_buffer_HSMMC_CH1);// AHB System Address For Write
SetADMASystemAddressReg_CH1((U32*)&RdDscrpt[0]);
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1*4); // Block Numbers to Read
SetArgumentReg_CH1(StartAddr);// Card Start Block Address to read
if (BlockNum_HSMMC_ch1 == 1)
{
SetTransferModeReg_CH1(0, 1, 0, 1, 1);
SetCommandReg_CH1(17, 0); // CMD17: Single-Read
}
else
{
SetTransferModeReg_CH1(1, 1, 1, 1, 1);
SetCommandReg_CH1(18, 0); // CMD18: Multi-Read
}
if (!WaitForCommandComplete_CH1())
{
printf(("Command NOT Complete\n"));
}
else
ClearCommandCompleteStatus_CH1();
while(!HS_ADMA_END_ch1);
//while(!HS_DESCRIPTOR_INT_ch1);
printf("\nDMA Read interrupt cnt = %x",HS_DESCRIPTOR_INT_ch1);
printf("\nTransfer Done interrupt cnt = %x",HS_ADMA_END_ch1);
Rx_buffer_HSMMC_ch1 = (U32 *)SDI_Rx_buffer_HSMMC_CH1;
for(j=0 ; j<((512*BlockNum_HSMMC_ch1)/4)*4 ; j++)
{
if(j%4 == 0)
printf("\n0x%04xh : ",Addr_temp);
printf("0x%08x ",*Rx_buffer_HSMMC_ch1++);
Addr_temp += 4;
}
HS_ADMA_END_ch1=0;
HS_DESCRIPTOR_INT_ch1=0;
BlockNum_HSMMC_ch1=0;
}
void MoviNand_BootWrite_CH1_Auto(void)
{
U32 i, j, StartAddr, OneBlockSize, Offset, Testmode;
U32 TotalWriteByte, WriteBlockCnt =0;
U32 transtime=0;
U32 uTxBufAddr = SDI_Tx_buffer_HSMMC_CH1;
U32 uCompareBufAddr = SDI_Compare_buffer_HSMMC_CH1;
wt_cnt_HSMMC_ch1=0;
BlockNum_HSMMC_ch1 = 0;
wt_cnt_HSMMC_ch1 = 0;
WriteBlockCnt_INT_ch1 = 0;
HS_DMA_END_ch1 = 0;
printf("\nSD/MMC block write test\n");
printf("\nCard Total block count = %d\n", TotalCardBlock_number_ch1);
Testmode=0;
StartAddr = TotalCardBlock_number_ch1-2048-18;
while((BlockNum_HSMMC_ch1 == 0) || (BlockNum_HSMMC_ch1 > 65535))
{
printf("Input number of Block [1~65535] : ");
BlockNum_HSMMC_ch1 = GetIntNum();
}
if(SectorMode_ch1 == 1)
{
StartAddr = StartAddr;
printf("\nSector Mode Addressing");
}
else
{
StartAddr = StartAddr * 512;
printf("\nByte Mode Addressing");
}
OneBlockSize = Card_OneBlockSize_ver1;
Tx_buffer_HSMMC_ch1 = (U32 *)SDI_Tx_buffer_HSMMC_CH1;
/*
for(i=0 ; i<(OneBlockSize*BlockNum_HSMMC_ch1)/4 ; i++)
{
*(Tx_buffer_HSMMC_ch1+i) = (i+Offset);
}
*/
switch(Testmode)
{
case POL_Ver1:
printf("\nPolling mode data write\n");
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1); // Block Numbers to Write
SetArgumentReg_CH1(StartAddr); // Card Address to Write
if(BlockNum_HSMMC_ch1 == 1)//single block
{
SetTransferModeReg_CH1(0, 0, 1, 1, 0);
SetCommandReg_CH1(24, 0);
}
else//multi block
{
SetTransferModeReg_CH1(1, 0, 1, 1, 0);
SetCommandReg_CH1(25, 0);
}
if (!WaitForCommandComplete_CH1())
{
printf("\nCommand is NOT completed\n");
}
ClearCommandCompleteStatus_CH1();
for(j=0; j<BlockNum_HSMMC_ch1; j++)
{
if (!WaitForBufferWriteReady_CH1())
printf("WriteBuffer NOT Ready\n");
else
ClearBufferWriteReadyStatus_CH1();
for(i=0; i<512/4; i++)//512 byte should be writed.
{
rHM1_BDATA = *Tx_buffer_HSMMC_ch1++;
wt_cnt_HSMMC_ch1++;
}
WriteBlockCnt ++;
}
TotalWriteByte = wt_cnt_HSMMC_ch1 *4;
printf("\nWrite count=%dByte\n",TotalWriteByte);
if(!WaitForTransferComplete_CH1())
{
printf(("Transfer is NOT Complete\n"));
}
ClearTransferCompleteStatus_CH1();
break;
case INT_Ver1:
printf("Interrupt mode data write\n");
pISR_SDI_1=(unsigned)HS_WRITE_INT_CH1;
SetBlockSizeReg_CH1(7, 512); // Maximum DMA Buffer Size, Block Size
SetBlockCountReg_CH1(BlockNum_HSMMC_ch1); // Block Numbers to Write
SetArgumentReg_CH1(StartAddr); // Card Address to Write
StartStopwatch();
if(BlockNum_HSMMC_ch1 == 1)//single block
{
SetTransferModeReg_CH1(0, 0, 1, 1, 0);
SetCommandReg_CH1(24, 0);
}
else//multi block
{
SetTransferModeReg_CH1(1, 0, 1, 1, 0);
SetCommandReg_CH1(25, 0);
}
if (!WaitForCommandComplete_CH1())
{
printf("\nCommand i⌨️ 快捷键说明
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