📄 pcm.c
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{
printf("not supported\n");
return;
}
//I2SCODEC_WrSerial(0x9e, (reg_addr<<1 | (unsigned char)(data>>8)), data);
I2SCODEC_WrSerial(0x9e, 0x18, 0x07); //MSTCLK_I = 19.2MHz
if(eClkSrc ==PCM_PCMCDCLK)
I2SCODEC_WrSerial(0x9e, 0x1B, 0x0); //PCM Codec generating external codec clock
else
I2SCODEC_WrSerial(0x9e, 0x1B, 0x6); //PCM Codec does not generate codec clcock(need to update comment, org was 'slave')
I2SCODEC_WrSerial(0x9e, 0x1E, uCodecSet); //DLCK = 128K,256kHz, or 512K, 14bit linear code (2's complement format)
I2SCODEC_WrSerial(0x9e, 0x0D, 0x5); //0 dB
I2SCODEC_WrSerial(0x9e, 0x06, 0x40); //POP Mute Off
I2SCODEC_WrSerial(0x9e, 0x03, 0x01); //CKI Buff On other blocks Off
Delay(1);
I2SCODEC_WrSerial(0x9e, 0x03, 0x09); //PLL2, CKI Buff On and other blocks Off
Delay(300);
I2SCODEC_WrSerial(0x9e, 0x05, 0x10); //TXSUM On and other blocks Off
I2SCODEC_WrSerial(0x9e, 0x05, 0x30); //PCM Codec, TX Sum On and other blocks Off
Delay(50);
I2SCODEC_WrSerial(0x9e, 0x0B, 0x11); //sw_COI, sw_TX1 Close and other sw Open
I2SCODEC_WrSerial(0x9e, 0x05, 0x35); //MIC AMP1, MIC BIAS1, PCM CODEC, TX SUM On and other bolcks OFF
Delay(1600);
return 1;
#elif ( PCM_CODEC_NAME == WM9713)
AC97_Port_Init();
if(AC97_Init())
{
AC97_Codec_Cmd(0,0x26, 0x4f00); // Enable PR5(Internal Clock, AC-link I/F)
AC97_Codec_Cmd(0,0x26, 0x4700); // Enable PR3(VREF, I/P PGA's, DAC's, ADC's, Mixer, O/P's)
AC97_Codec_Cmd(0,0x3C, 0xfbff); // Enable MBIAS generator
Delay(1000);
#if 1
AC97_Codec_Cmd(0,0x26, 0x4300); // Enable I/P PGA's nad Mixers
AC97_Codec_Cmd(0,0x3C, 0xfbcf); // Enable ADC L 0xfbcf
AC97_Codec_Cmd(0,0x26, 0x4200); // Enable Stereo ADC
AC97_Codec_Cmd(0,0x26, 0x0200); // Enable PR6 (O/P PGA's)
//AC97_Codec_Cmd(0,0x3E, 0xffbf); // Enable LINE L PGA
//if (AUDIOIN == LINEIN)
// AC97_Codec_Cmd(0,0x3E, 0xffaf); // Enable LINE L/R PGA
//else if (AUDIOIN == MICIN)
// AC97_Codec_Cmd(0,0x3E, 0xfff0); // Enable MIC L/R PGA
printf("0. disable mic bias 1. enable mic bias [1]\n");
//i = GetIntNum();
//if(i==0) AC97_Codec_Cmd(0,0x3E, 0xfff0); // diable mic bias, Enable MIC L/R PGA
//else
AC97_Codec_Cmd(0,0x3E, 0xbff0); // Enable mic bias, MIC L/R PGA
printf("VRA(Variable Rate) Enable(1)/Disable(0): \n");
//i = GetIntNum();
//if(i==1)
AC97_Codec_Cmd(0,0x2A,0x1); //Variable Rate Enable
//else AC97_Codec_Cmd(0,0x2A,0x0); //Variable Rate Disable
printf("VRA : 0x%x\n",(0x1&AC97_Codec_Cmd(1,0x2A,0x0001)));
AC97_Codec_Cmd(0,0x32, 0x1f40); // ADC SR = 8kHz
//AC97_Codec_Cmd(0,0x14, 0xfe52); // Record Mux Source Selection: LINE L/R //11 111 11 0 0 1 010 010 = 1111 1110 0101 0010
//if (AUDIOIN == LINEIN)
//{
// AC97_Codec_Cmd(0,0x14, 0xfe52); // Record Mux Source Selection: LINE L/R 0xfe12
//}
//else if (AUDIOIN == MICIN)
//{
AC97_Codec_Cmd(0,0x22, 0x4040); //MIC Preamp Contorl : MIC2A only, 12dB, MICBias
AC97_Codec_Cmd(0,0x10, 0x68); //Unmute MIC routing : unmute MICA, MICA only
AC97_Codec_Cmd(0,0x14, 0xfe00); //Record Mux Source Selection: MICA
//}
AC97_Codec_Cmd(0,0x12, 0x0f0f);
AC97_Codec_Cmd(0,0x5C, 0x0008); // ADC High-Pass Filter On -> this function remove noise where is no input
AC97_Codec_Cmd(0,0x5A, 0x0020); // HPF Corner Freq.
AC97_Codec_Cmd(0,0x60, 0xf0f0); //ALC control 1111 1111 1111 1111
AC97_Codec_Cmd(0,0x62, 0xbfbf); //ALC On : Upper 2 bytes are relate on ALC and Lower 2 bytes are relate on Noise Gate
AC97_Codec_Cmd(0,0x12, 0x3f00); // Unmute ADC and Set ADC Recoding Volume
if (eMSBPos == DURING_PCMSYNC_HIGH)
//AC97_Codec_Cmd(0,0x36, 0xa6b3); // PCM IF=DSP B type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 1110 0011
AC97_Codec_Cmd(0,0x36, 0xa6e3); // PCM IF=DSP B type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 1110 0011
else //AFTER_PCMSYNC_HIGH = Dsp Mode A
AC97_Codec_Cmd(0,0x36, 0xa6a3); // PCM IF=DSP A type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 1010 0011
AC97_Codec_Cmd(0,0x44, 0x0b80); // PCM CLK = 8kHz 0000 1011 1000 0000
AC97_Codec_Cmd(0,0x4C, 0xffde); // GPIO config. For PCM IF (Slave mode)
#else
AC97_Codec_Cmd(0,0x42, 0x0000);
AC97_Codec_Cmd(0,0x26, 0x4300);
AC97_Codec_Cmd(0,0x3c, 0xebde);
AC97_Codec_Cmd(0,0x26, 0x4200);
AC97_Codec_Cmd(0,0x26, 0x020d);
AC97_Codec_Cmd(0,0x3e, 0xdfef);
AC97_Codec_Cmd(0,0x32, 0x1f40);
AC97_Codec_Cmd(0,0x08, 0xdf40);
AC97_Codec_Cmd(0,0x12, 0x0000);
AC97_Codec_Cmd(0,0x14, 0xfe1b);
AC97_Codec_Cmd(0,0x18, 0xff20);
AC97_Codec_Cmd(0,0x1c, 0x8000);
if (g_oPCMState.PCMMSBPosition == DURING_PCMSYNC_HIGH)
AC97_Codec_Cmd(0,0x36, 0xa6e3); // PCM IF=DSP B type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 1110 0011
else //AFTER_PCMSYNC_HIGH = Dsp Mode A
AC97_Codec_Cmd(0,0x36, 0xa6a3); // PCM IF=DSP A type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 1010 0011
AC97_Codec_Cmd(0,0x44, 0x0b80); // PCM CLK = 8kHz 0000 1011 1000 0000
AC97_Codec_Cmd(0,0x4C, 0xffde); // GPIO config. For PCM IF (Slave mode)
#endif
return 1;
}
// else return 0;
#elif ( PCM_CODEC_NAME == WM8753)
IIC_open( (unsigned int)200000); // Serial EEPROM IIC clk = 200KHz
I2SCODEC_WrSerial(0x34, 0x3e, 0x00); //Reset
I2SCODEC_WrSerial(0x34, 0x02, 0x08); //DAC Control Mute
I2SCODEC_WrSerial(0x34, 0x04, 0x00); //ADC Control
if (eMSBPos == DURING_PCMSYNC_HIGH)
I2SCODEC_WrSerial(0x34, 0x07, 0xb3); //PCM Audio I/F
else
I2SCODEC_WrSerial(0x34, 0x07, 0xa3); //PCM Audio I/F
I2SCODEC_WrSerial(0x34, 0x08, 0x0a); //HiFi Audio I/F
I2SCODEC_WrSerial(0x34, 0x0a, 0x00); //Interface Control << Voice Codec >>
//I2SCODEC_WrSerial(0x34, 0x0c, 0x34); //Sync Rate Control
if (eSync == SYNC_8K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x0c); //Sync Rate Control 8KHz
else if (eSync== SYNC_16K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x14); //Sync Rate Control 16KHz
else if (eSync== SYNC_32K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x18); //Sync Rate Control 32KHz
else if (eSync== SYNC_48K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x00); //Sync Rate Control 48KHz
else if (eSync== SYNC_96K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x1e); //Sync Rate Control 96KHz
I2SCODEC_WrSerial(0x34, 0x0e, 0x97); //Sample Rate Control (2), Don't care in case of slave mode
I2SCODEC_WrSerial(0x34, 0x10, 0xff); //Left DAC Volume
I2SCODEC_WrSerial(0x34, 0x12, 0xff); //Right DAC Volume
I2SCODEC_WrSerial(0x34, 0x18, 0x7b); //ALC 1
I2SCODEC_WrSerial(0x34, 0x1a, 0x00); //ALC 2
I2SCODEC_WrSerial(0x34, 0x1c, 0x32); //ALC 3
I2SCODEC_WrSerial(0x34, 0x1e, 0x00); //Noise Gate
I2SCODEC_WrSerial(0x34, 0x21, 0xc3); //Left ADC Volume
I2SCODEC_WrSerial(0x34, 0x23, 0xc3); //Right ADC Volume
I2SCODEC_WrSerial(0x34, 0x24, 0xc0); //Additional Control
I2SCODEC_WrSerial(0x34, 0x26, 0x00); //Three D Control
I2SCODEC_WrSerial(0x34, 0x28, 0xc0); //Power Management(1) << Power up VMID[50K ohm]; VREF >>
I2SCODEC_WrSerial(0x34, 0x2a, 0x0c); //Power Management(2) << Power up ADCL/R >>
I2SCODEC_WrSerial(0x34, 0x2c, 0x00); //Power Management(3)
I2SCODEC_WrSerial(0x34, 0x2e, 0x00); //Power Management(4)
I2SCODEC_WrSerial(0x34, 0x30, 0x00); //ID Register
I2SCODEC_WrSerial(0x34, 0x32, 0x00); //Int. Polarty
I2SCODEC_WrSerial(0x34, 0x34, 0x00); //Int. Enable
I2SCODEC_WrSerial(0x34, 0x36, 0x00); //GPIO Control (1)
I2SCODEC_WrSerial(0x34, 0x38, 0x00); //GPIO Control (2)
I2SCODEC_WrSerial(0x34, 0x40, 0x55); //Record Mix (1)
I2SCODEC_WrSerial(0x34, 0x42, 0x05); //Record Mix (2)
I2SCODEC_WrSerial(0x34, 0x44, 0x50); //Left Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x46, 0x55); //Left Out Mix(2)
I2SCODEC_WrSerial(0x34, 0x48, 0x50); //Rigth Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x4a, 0x55); //Right Out Mix(2)
I2SCODEC_WrSerial(0x34, 0x4c, 0x50); //Mono Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x4e, 0x55); //Mono Out Mix(2)
I2SCODEC_WrSerial(0x34, 0x50, 0x79); //LOUT1 Volume
I2SCODEC_WrSerial(0x34, 0x52, 0x79); //ROUT1 Volume
I2SCODEC_WrSerial(0x34, 0x54, 0x79); //LOUT2 Volume
I2SCODEC_WrSerial(0x34, 0x56, 0x79); //ROUT2 Volume
I2SCODEC_WrSerial(0x34, 0x58, 0x79); //MONO Out
I2SCODEC_WrSerial(0x34, 0x5a, 0x00); //Output Control
I2SCODEC_WrSerial(0x34, 0x5c, 0x05); //ADC Input Mode << Set L/R ADC input select to Line 1/2 '01' >>
I2SCODEC_WrSerial(0x34, 0x5e, 0x00); //Input Control (1)
I2SCODEC_WrSerial(0x34, 0x60, 0x00); //Input Control (2)
I2SCODEC_WrSerial(0x34, 0x62, 0x97); //Left Input Volume
I2SCODEC_WrSerial(0x34, 0x64, 0x97); //Right Input Volume
I2SCODEC_WrSerial(0x34, 0x66, 0x00); //MIC Bias Comp Control
I2SCODEC_WrSerial(0x34, 0x68, 0x04); //Clock Control << Clock for Voice Codec = MCLK or PLL1
I2SCODEC_WrSerial(0x34, 0x6a, 0x00); //PLL1 Control (1)
I2SCODEC_WrSerial(0x34, 0x6c, 0x83); //PLL1 Control (2)
I2SCODEC_WrSerial(0x34, 0x6e, 0x24); //PLL1 Control (3)
I2SCODEC_WrSerial(0x34, 0x71, 0xba); //PLL1 Control (4)
I2SCODEC_WrSerial(0x34, 0x72, 0x00); //PLL2 Control (1)
I2SCODEC_WrSerial(0x34, 0x74, 0x83); //PLL2 Control (2)
I2SCODEC_WrSerial(0x34, 0x76, 0x24); //PLL2 Control (3)
I2SCODEC_WrSerial(0x34, 0x79, 0xba); //PLL2 Control (4)
I2SCODEC_WrSerial(0x34, 0x7a, 0x00); //Bias Control
I2SCODEC_WrSerial(0x34, 0x7e, 0x00); //Additional Control
IIC_close();
return 1;
#endif
}
void PCM_CodecExitPCMIn(void)
{
#if (PCM_CODEC_NAME == AK2430)
I2SCODEC_WrSerial(0x9e, 0x05, 0x30); //MIC Amp1, MIC Bias1 Off
Delay(1300);
I2SCODEC_WrSerial(0x9e, 0x0B, 0x00); //sw_COI, sw_TX1 Open
I2SCODEC_WrSerial(0x9e, 0x05, 0x00); //TX SUM, PCM Codec Off
#elif ( PCM_CODEC_NAME == WM9713)
AC97_Codec_Cmd(0,0x3E, 0xffff); //Disable LINE L/R output PGA's
AC97_Codec_Cmd(0,0x26, 0xff00); //Disable I/P PGA's nad Mixers
#endif
}
bool PCM_CodecInitPCMOut(unsigned int eSync, unsigned char eMSBPos, unsigned int eSclk, unsigned char eClkSrc)
{
int i;
unsigned char uCodecSet;
#if (PCM_CODEC_NAME == AK2430)
if(eSclk == SCLK_128K)
uCodecSet = 0x0;
else if(eSclk == SCLK_256K)
uCodecSet = 0x1;
else if(eSclk == SCLK_512K)
uCodecSet = 0x2;
I2SCODEC_WrSerial(0x9e, 0x18, 0x07); //MSTCLK_I = 19.2MHz
if(eClkSrc ==PCM_PCMCDCLK)
I2SCODEC_WrSerial(0x9e, 0x1B, 0x0); //PCM Codec Master Mode
else
I2SCODEC_WrSerial(0x9e, 0x1B, 0x6); //PCM Codec Slave Mode
I2SCODEC_WrSerial(0x9e, 0x1E, uCodecSet); //DLCK = 128K,256kHz, or 512K, 14bit linear code (2's complement format)
I2SCODEC_WrSerial(0x9e, 0x0C, 0x00); //0 dB
I2SCODEC_WrSerial(0x9e, 0x10, 0x1F); //three dB
I2SCODEC_WrSerial(0x9e, 0x11, 0x1F); //three dB
I2SCODEC_WrSerial(0x9e, 0x06, 0x40); //POP Mute Off
I2SCODEC_WrSerial(0x9e, 0x03, 0x01); //CKI Buff On other blocks Off
Delay(1);
I2SCODEC_WrSerial(0x9e, 0x03, 0x09); //PLL2, CKI Buff On and other blocks Off
Delay(300);
I2SCODEC_WrSerial(0x9e, 0x04, 0x01); //RXSUM On and other blocks Off
I2SCODEC_WrSerial(0x9e, 0x05, 0x20); //PCM Codec On and other blocks Off
Delay(50);
I2SCODEC_WrSerial(0x9e, 0x07, 0x20); //sw_COL Close and other sw Open
I2SCODEC_WrSerial(0x9e, 0x08, 0x20); //sw_COR Close and othr sw Open
I2SCODEC_WrSerial(0x9e, 0x09, 0x14); //sw_EPL, sw_EPR Amp output
I2SCODEC_WrSerial(0x9e, 0x04, 0x31); //EPL/R Amp(RXSUM) On and other blocks Off
Delay(1600);
return 1;
#elif ( PCM_CODEC_NAME == WM9713)
AC97_Port_Init();
if(AC97_Init())
{
AC97_Codec_Cmd(0,0x26, 0x4f00); // Enable PR5(Internal Clock, AC-link I/F)
AC97_Codec_Cmd(0,0x26, 0x4700); // Enable PR3(VREF, I/P PGA's, DAC's, ADC's, Mixer, O/P's)
AC97_Codec_Cmd(0,0x3C, 0xfbff); // Enable MBIAS generator
Delay(1000);
AC97_Codec_Cmd(0,0x26, 0x4300); // Enable I/P PGA's nad Mixers
AC97_Codec_Cmd(0,0x3C, 0xebf3); // Enable VXDAC, L/R HP
AC97_Codec_Cmd(0,0x26, 0x4100); // Enable DAC
AC97_Codec_Cmd(0,0x26, 0x0100); // Enable PR6 (O/P PGA's)
AC97_Codec_Cmd(0,0x3E, 0xf9ff); // Enable HPL/R output PGA's
AC97_Codec_Cmd(0,0x1C, 0x00a0); // HPL/R PGA input select: HPMIXL/R
AC97_Codec_Cmd(0,0x04, 0x8a8a); // Set HL/R Volume = -6dB
printf("VRA(Variable Rate) Enable(1)/Disable(0): \n");
//i = GetIntNum();
//if(i==1)
AC97_Codec_Cmd(0,0x2A,0x1); //Variable Rate Enable
//else AC97_Codec_Cmd(0,0x2A,0x0); //Variable Rate Disable
printf("VRA : 0x%x\n",(0x1&AC97_Codec_Cmd(1,0x2A,0x0001)));
AC97_Codec_Cmd(0,0x2E, 0x1f40); // AUXDAC = 8kHz
AC97_Codec_Cmd(0,0x12,0x8000); //Disable ADC because it makes noise when ADC is turn on
AC97_Codec_Cmd(0,0x18, 0x02aa); // Unmute VXDAC to HPMIXL/R
AC97_Codec_Cmd(0,0x04, 0x0a80); // Unmute HPL/R
if (eMSBPos == DURING_PCMSYNC_HIGH) //DURING_PCMSYNC_HIGH = Dsp Mode B
AC97_Codec_Cmd(0,0x36, 0xa6b3); // PCM IF=DSP B type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 0110 0011
else //AFTER_PCMSYNC_HIGH = Dsp Mode A
AC97_Codec_Cmd(0,0x36, 0xa6a3); // PCM IF=DSP A type, 16Bit, Slave Mode, Fs=8kHz 1010 0110 0010 0011
AC97_Codec_Cmd(0,0x44, 0x0b80); // PCM CLK = 8kHz
AC97_Codec_Cmd(0,0x4C, 0xffde); // GPIO config. For PCM IF (Slave mode)
return 1;
}
// else return 0;
#elif ( PCM_CODEC_NAME == WM8753)
IIC_open( (unsigned int)200000); // Serial EEPROM IIC clk = 200KHz
// address<<1 | data>>8, data[7:0]
I2SCODEC_WrSerial(0x34, 0x3e, 0x00); //Reset
I2SCODEC_WrSerial(0x34, 0x28, 0xd0); //PWR Management(1) << Power up VMID[50Kohm]; VREF; VDAC >>
I2SCODEC_WrSerial(0x34, 0x2e, 0x03); //PWR Management(4) << Power up L/RMIX >>
Delay(1000);
I2SCODEC_WrSerial(0x34, 0x02, 0x08); //DAC Control Mute
I2SCODEC_WrSerial(0x34, 0x04, 0x00); //ADC Control
if (eSync == DURING_PCMSYNC_HIGH)
I2SCODEC_WrSerial(0x34, 0x07, 0xb3); //PCM Audio I/F Mode B
else
I2SCODEC_WrSerial(0x34, 0x07, 0xa3); //PCM Audio I/F Mode A
I2SCODEC_WrSerial(0x34, 0x08, 0x0a); //HiFi Audio I/F
I2SCODEC_WrSerial(0x34, 0x0a, 0x33); //Interface Control << Voice Codec >>
if (eSync == SYNC_8K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x0c); //Sync Rate Control 8KHz
else if (eSync == SYNC_16K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x14); //Sync Rate Control 16KHz
else if (eSync == SYNC_32K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x18); //Sync Rate Control 32KHz
else if (eSync == SYNC_48K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x00); //Sync Rate Control 48KHz
else if (eSync == SYNC_96K)
I2SCODEC_WrSerial(0x34, 0x0c, 0x1e); //Sync Rate Control 96KHz
I2SCODEC_WrSerial(0x34, 0x0e, 0x97); //Sample Rate Control (2), Don't care in case of slave mode
I2SCODEC_WrSerial(0x34, 0x10, 0xff); //Left DAC Volume
I2SCODEC_WrSerial(0x34, 0x12, 0xff); //Right DAC Volume
I2SCODEC_WrSerial(0x34, 0x14, 0x0f); //Bass Control
I2SCODEC_WrSerial(0x34, 0x16, 0x0f); //Treble Control
I2SCODEC_WrSerial(0x34, 0x18, 0x7b); //ALC 1
I2SCODEC_WrSerial(0x34, 0x1a, 0x00); //ALC 2
I2SCODEC_WrSerial(0x34, 0x1c, 0x32); //ALC 3
I2SCODEC_WrSerial(0x34, 0x1e, 0x00); //Noise Gate
I2SCODEC_WrSerial(0x34, 0x21, 0xc3); //Left ADC Volume
I2SCODEC_WrSerial(0x34, 0x23, 0xc3); //Right ADC Volume
I2SCODEC_WrSerial(0x34, 0x24, 0xc0); //Additional Control
I2SCODEC_WrSerial(0x34, 0x26, 0x00); //Three D Control
I2SCODEC_WrSerial(0x34, 0x2a, 0x00); //Power Management(2)
I2SCODEC_WrSerial(0x34, 0x30, 0x00); //ID Register
I2SCODEC_WrSerial(0x34, 0x32, 0x00); //Int. Polarty
I2SCODEC_WrSerial(0x34, 0x34, 0x00); //Int. Enable
I2SCODEC_WrSerial(0x34, 0x36, 0x00); //GPIO Control (1)
I2SCODEC_WrSerial(0x34, 0x38, 0x00); //GPIO Control (2)
I2SCODEC_WrSerial(0x34, 0x40, 0x55); //Record Mix (1)
I2SCODEC_WrSerial(0x34, 0x42, 0x05); //Record Mix (2)
I2SCODEC_WrSerial(0x34, 0x44, 0x50); //Left Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x47, 0x55); //Left Out Mix(2) << Set the VXD2LO bit (Voice DAC to Left Output >>
I2SCODEC_WrSerial(0x34, 0x48, 0x50); //Rigth Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x4b, 0x55); //Right Out Mix(2) << Set the VXD2RO bit (Voice DAC to Right Output) >>
I2SCODEC_WrSerial(0x34, 0x4c, 0x50); //Mono Out Mix(1)
I2SCODEC_WrSerial(0x34, 0x4e, 0x55); //Mono Out Mix(2)
I2SCODEC_WrSerial(0x34, 0x51, 0x79); //LOUT1 Volume << Set Left OUtput 1 Volume Update bit to '1' & Volume Level to Default >>
I2SCODEC_WrSerial(0x34, 0x53, 0x79); //ROUT1 Volume << Set Right OUtput 1 Volume Update bit to '1' & Volume Level to Default >>
I2SCODEC_WrSerial(0x34, 0x54, 0x79); //LOUT2 Volume
I2SCODEC_WrSerial(0x34, 0x56, 0x79); //ROUT2 Volume
I2SCODEC_WrSerial(0x34, 0x58, 0x79); //MONO Out
I2SCODEC_WrSerial(0x34, 0x5a, 0x00); //Output Control
I2SCODEC_WrSerial(0x34, 0x5c, 0x00); //ADC Input Mode
I2SCODEC_WrSerial(0x34, 0x5e, 0x00); //Input Control (1)
I2SCODEC_WrSerial(0x34, 0x60, 0x00); //Input Control (2)
I2SCODEC_WrSerial(0x34, 0x62, 0x97); //Left Input Volume
I2SCODEC_WrSerial(0x34, 0x64, 0x97); //Right Input Volume
I2SCODEC_WrSerial(0x34, 0x66, 0x00); //MIC Bias Comp Control
I2SCODEC_WrSerial(0x34, 0x68, 0x04); //Clock Control << Clock for Voice Codec = MCLK or PLL1
I2SCODEC_WrSerial(0x34, 0x6a, 0x00); //PLL1 Control (1)
I2SCODEC_WrSerial(0x34, 0x6c, 0x83); //PLL1 Control (2)
I2SCODEC_WrSerial(0x34, 0x6e, 0x24); //PLL1 Control (3)
I2SCODEC_WrSerial(0x34, 0x71, 0xba); //PLL1 Control (4)
I2SCODEC_WrSerial(0x34, 0x72, 0x00); //PLL2 Control (1)
I2SCODEC_WrSerial(0x34, 0x74, 0x83); //PLL2 Control (2)
I2SCODEC_WrSerial(0x34, 0x76, 0x24); //PLL2 Control (3)
I2SCODEC_WrSerial(0x34, 0x79, 0xba); //PLL2 Control (4)
I2SCODEC_WrSerial(0x34, 0x7a, 0x00); //Bias Control
I2SCODEC_WrSerial(0x34, 0x7e, 0x00); //Additional Control
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