📄 codec.c
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I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x13f); // R50(0x64)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1c3); // R16(0x20) left adc volume 0db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22) right adc volume 0db
// switch(sNum)
{
// case 1 : //MIC1 Record
I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x100); // R51(0x66) MIC1 select
// break;
// case 2 : //IC2 Record
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x40); // R51(0x66) MIC2 select
// break;
// default :
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x100); // R51(0x66) MIC1 select
// break;
// }
*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x02, 0x00); // R2(0x04) adc high pass filter 3.4Hz at fs = 48KHz
I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x02); // R3 adc 16bit i2s format
I2SCODEC_SendWmData(WM8753_ID_WR, 0x04, 0x02); // R4 codec is slave 16bit i2s
I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x08); // R5 ap is master
I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x00); // R6 mclk input using to adc, dac
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1d5); // R16(0x20) left adc volume 10db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22) right adc volume 10db
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x187); // R12(0x18) alc
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13(0x1a)
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14(0x1c)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xe0); // R20(0x28) Pwr_mgt1 VMIDSEL(50Kohm), VREF, MICB enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x1ff); // R21(0x2a) Pwr_mgt2 all enable, micamp enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x1ff); // R22(0x2c) Pwr_mgt3
I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x1ff); // R23(0x2e) Pwr_mgt4
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x0c); // R46 LM select PGA
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x60); // R47 Mix preamp1 gain +30db
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x30, 0x10); // R48(0x60) Input control2 : mic 1 preamp output
I2SCODEC_SendWmData(WM8753_ID_WR, 0x30, 0x02); // R48(0x60) Input control2
I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x13f); // R49(0x62)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x13f); // R50(0x64)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x100); // R51(0x66) micbias 0.9AVDD, MIC1 select
}
else if(txr == I2S_MODE_RX && LineMic == CODEC_LINEIN)
{
/*Record - line*/
/*Default setting value*/
/*
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1f, 0x00); // R31(0x3e) Reset
I2SCODEC_SendWmData(WM8753_ID_WR, 0x30, 0x08); // R48(0x60) Input control2
I2SCODEC_SendWmData(WM8753_ID_WR, 0x02, 0x00); // R2(0x04)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x04, 0x02); // R4(0x08) I2S 16bit
I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x0b); // R5(0x0a)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x00); // R6(0x0c)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x18b); // R12(0x18)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13(0x1a)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14(0x1c)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xe0); // R20(0x28) Pwr_mgt1 VMIDSEL(50Kohm), VREF, MICB enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x1ff); // R21(0x2a) Pwr_mgt2 all enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x1ff); // R22(0x2c) Pwr_mgt3
I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x1ff); // R23(0x2e) Pwr_mgt4
I2SCODEC_SendWmData(WM8753_ID_WR, 0x20, 0x77); // R32
I2SCODEC_SendWmData(WM8753_ID_WR, 0x21, 0x00); // R33
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x05); // R46 ADC input Mode as LINE1 and LINE2
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x1e0); // R47(0x5e)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x13f); // R49(0x62)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x13f); // R50(0x64)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1c3); // R16(0x20)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22)
*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1f, 0x00); // R31(0x3e) Reset
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x30, 0x08); // R48(0x60) Input control2, alc, mic
I2SCODEC_SendWmData(WM8753_ID_WR, 0x02, 0x00); // R2(0x04) adc high pass filter 3.4Hz at fs = 48KHz
I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x02); // R3 adc 16bit i2s format
I2SCODEC_SendWmData(WM8753_ID_WR, 0x04, 0x02); // R4 codec is slave 16bit i2s format
I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x08); // R5 ap is master, HiFI Audio Interface ADC and DAC at same sample rate
I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x00); // R6 mclk input using to adc, dac
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x18b); // R12(0x18) ; alc off
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13(0x1a)
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14(0x1c)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0f, 0x03); // R15 noise gate, mute adc output.
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0x40); // R20 Pwr_mgt1 VREF enable, mclk to digital
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x06); // R21 Pwr_mgt2 Left ADC, Right ADC on
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x00); // R22 Pwr_mgt3 out all off
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x03); // R23 Pwr_mgt4 rightmix, left mix on
I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xe0); // R20(0x28) Pwr_mgt1 VMIDSEL(50Kohm), VREF, MICB enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x1ff); // R21(0x2a) Pwr_mgt2 all enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x1ff); // R22(0x2c) Pwr_mgt3
I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x1ff); // R23(0x2e) Pwr_mgt4
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x20, 0x77); // R32 record mixer right, left
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x21, 0x00); // R33 record mixer mono
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x05); // R46 LM select LINE1 RM select LINE2
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x0); // R47 ADC input direct from LM and RM
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x13f); // R49(0x62) left pga
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x13f); // R50(0x64) right pga
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1c3); // R16(0x20) left adc volume 0db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22) right adc volume 0db
}
else if(LineMic == CODEC_LINEIN)
{
/*Record*/
/*Default setting value*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1f, 0x00); // R31 reset [T,R]
I2SCODEC_SendWmData(WM8753_ID_WR, 0x01, 0x00); // R1 DAC control [T]
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x0a); // R3 PCM Audio interface [T]
I2SCODEC_SendWmData(WM8753_ID_WR, 0x02, 0x00); // R2(0x04) adc high pass filter 3.4Hz at fs = 48KHz
I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x02); // R3 adc 16bit i2s format
// I2S Master Mode ( Codec Slave Mode)
if ( OpMode == I2S_MASTER )
{
I2SCODEC_SendWmData(WM8753_ID_WR, 0x04, 0x02); // R4 HiFI Audio interface 16bit, Codec is Slave [T,R]
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x3b); // R5 HiFI Audio Interface ADC and DAC at same sample rate
I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x08); // R5 ap is master, HiFI Audio Interface ADC and DAC at same sample rate
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x38); // R6 SR[5:1] 44.1Khz used recording
I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x00); // R6 mclk input using to adc, dac
I2SCODEC_SendWmData(WM8753_ID_WR, 0x07, 0xa7); // R7
}
I2SCODEC_SendWmData(WM8753_ID_WR, 0x08, 0x1ff); // R8
I2SCODEC_SendWmData(WM8753_ID_WR, 0x09, 0x1ff); // R9
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0a, 0x0f); // R10
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0b, 0x0f); // R11
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x7b); // R12
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13 ALCSR[7:4] 00 48Khz used playing
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x22); // R13 ALCSR[7:4] 22 44.1Khz used playing
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0f, 0x00); // R15
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0xc3); // R16
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0xc3); // R17
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1c3); // R16(0x20) left adc volume 0db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22) right adc volume 0db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x12, 0xc0); // R18
I2SCODEC_SendWmData(WM8753_ID_WR, 0x13, 0x00); // R19
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xcc); // R20 Pwr mgt
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x00); // R21
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x03); // R23 Pwr mgt
I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xcc); // R20(0x28) Pwr_mgt1 all enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x1ff); // R21(0x2a) Pwr_mgt2 all enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x1ff); // R22(0x2c) Pwr_mgt3
I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x1ff); // R23(0x2e) Pwr_mgt4
I2SCODEC_SendWmData(WM8753_ID_WR, 0x18, 0x00); // R24
I2SCODEC_SendWmData(WM8753_ID_WR, 0x19, 0x00); // R25
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1a, 0x00); // R26
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1b, 0x00); // R27
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1c, 0x00); // R28
I2SCODEC_SendWmData(WM8753_ID_WR, 0x20, 0x55); // R32
I2SCODEC_SendWmData(WM8753_ID_WR, 0x21, 0x05); // R33
I2SCODEC_SendWmData(WM8753_ID_WR, 0x22, 0x150); // R34 LoutMix.. Must be 0x45(not 0x44)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x23, 0x55); // R35
I2SCODEC_SendWmData(WM8753_ID_WR, 0x24, 0x150); // R36 RoutMix.. Must be 0x49(not 0x48)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x25, 0x55); // R37
I2SCODEC_SendWmData(WM8753_ID_WR, 0x26, 0x50); // R38
I2SCODEC_SendWmData(WM8753_ID_WR, 0x27, 0x55); // R39
I2SCODEC_SendWmData(WM8753_ID_WR, 0x28, 0x15f); // R40(0x51) Lout1 volume Must be 0x51(not 0x50)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x29, 0x15f); // R41(0x53) Rout1 volume Must be 0x53(not 0x52)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2a, 0x15f); // R42(0x55) Lout2 volume Must be 0x55(not 0x54)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2b, 0x15f); // R43(0x57) Rout2 volume Must be 0x57(not 0x56)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2c, 0x79); // R44
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2d, 0x04); // R45
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x00); // R46
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x00); // R47
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x05); // R46 LM select LINE1 RM select LINE2
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x0); // R47 ADC input direct from LM and RM
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x97); // R49
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x97); // R50
I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x00); // R51
I2SCODEC_SendWmData(WM8753_ID_WR, 0x34, 0x04); // R52
I2SCODEC_SendWmData(WM8753_ID_WR, 0x35, 0x00); // R53
I2SCODEC_SendWmData(WM8753_ID_WR, 0x36, 0x83); // R54
I2SCODEC_SendWmData(WM8753_ID_WR, 0x37, 0x24); // R55
I2SCODEC_SendWmData(WM8753_ID_WR, 0x38, 0x1ba); // R56
I2SCODEC_SendWmData(WM8753_ID_WR, 0x39, 0x00); // R57
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3a, 0x83); // R58
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3b, 0x24); // R59
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3c, 0x1ba); // R60
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3d, 0x00); // R61
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3f, 0x00); // R63
/*headphone*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x180); // R22(0x2c) Pwr mgt Lout1, Rout1
}
else
{
/*Record*/
/*Default setting value*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1f, 0x00); // R31 reset [T,R]
I2SCODEC_SendWmData(WM8753_ID_WR, 0x01, 0x00); // R1 DAC control [T]
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x0a); // R3 PCM Audio interface [T]
I2SCODEC_SendWmData(WM8753_ID_WR, 0x02, 0x00); // R2(0x04) adc high pass filter 3.4Hz at fs = 48KHz
I2SCODEC_SendWmData(WM8753_ID_WR, 0x03, 0x02); // R3 adc 16bit i2s format
// I2S Master Mode ( Codec Slave Mode)
if ( OpMode == I2S_MASTER )
{
I2SCODEC_SendWmData(WM8753_ID_WR, 0x04, 0x02); // R4 HiFI Audio interface 16bit, Codec is Slave [T,R]
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x3b); // R5 HiFI Audio Interface ADC and DAC at same sample rate
I2SCODEC_SendWmData(WM8753_ID_WR, 0x05, 0x08); // R5 ap is master, HiFI Audio Interface ADC and DAC at same sample rate
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x38); // R6 SR[5:1] 44.1Khz used recording
I2SCODEC_SendWmData(WM8753_ID_WR, 0x06, 0x00); // R6 mclk input using to adc, dac
I2SCODEC_SendWmData(WM8753_ID_WR, 0x07, 0xa7); // R7
}
I2SCODEC_SendWmData(WM8753_ID_WR, 0x08, 0x1ff); // R8
I2SCODEC_SendWmData(WM8753_ID_WR, 0x09, 0x1ff); // R9
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0a, 0x0f); // R10
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0b, 0x0f); // R11
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x7b); // R12
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13 ALCSR[7:4] 00 48Khz used playing
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x22); // R13 ALCSR[7:4] 22 44.1Khz used playing
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0c, 0x187); // R12(0x18) alc
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0d, 0x00); // R13(0x1a)
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x0e, 0x32); // R14(0x1c)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x0f, 0x00); // R15
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0xc3); // R16
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0xc3); // R17
I2SCODEC_SendWmData(WM8753_ID_WR, 0x10, 0x1d5); // R16(0x20) left adc volume 10db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x11, 0x1c3); // R17(0x22) right adc volume 0db
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x12, 0xc0); // R18
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x13, 0x00); // R19
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xcc); // R20 Pwr mgt
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x00); // R21
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x03); // R23 Pwr mgt
I2SCODEC_SendWmData(WM8753_ID_WR, 0x14, 0xec); // R20(0x28) Pwr_mgt1 all enable, VMIDSEL(50Kohm), VREF, MICB enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x15, 0x1ff); // R21(0x2a) Pwr_mgt2 all enable
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x1ff); // R22(0x2c) Pwr_mgt3
I2SCODEC_SendWmData(WM8753_ID_WR, 0x17, 0x1ff); // R23(0x2e) Pwr_mgt4
I2SCODEC_SendWmData(WM8753_ID_WR, 0x18, 0x00); // R24
I2SCODEC_SendWmData(WM8753_ID_WR, 0x19, 0x00); // R25
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1a, 0x00); // R26
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1b, 0x00); // R27
I2SCODEC_SendWmData(WM8753_ID_WR, 0x1c, 0x00); // R28
I2SCODEC_SendWmData(WM8753_ID_WR, 0x20, 0x55); // R32
I2SCODEC_SendWmData(WM8753_ID_WR, 0x21, 0x05); // R33
I2SCODEC_SendWmData(WM8753_ID_WR, 0x22, 0x150); // R34 LoutMix.. Must be 0x45(not 0x44)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x23, 0x55); // R35
I2SCODEC_SendWmData(WM8753_ID_WR, 0x24, 0x150); // R36 RoutMix.. Must be 0x49(not 0x48)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x25, 0x55); // R37
I2SCODEC_SendWmData(WM8753_ID_WR, 0x26, 0x50); // R38
I2SCODEC_SendWmData(WM8753_ID_WR, 0x27, 0x55); // R39
I2SCODEC_SendWmData(WM8753_ID_WR, 0x28, 0x15f); // R40(0x51) Lout1 volume Must be 0x51(not 0x50)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x29, 0x15f); // R41(0x53) Rout1 volume Must be 0x53(not 0x52)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2a, 0x15f); // R42(0x55) Lout2 volume Must be 0x55(not 0x54)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2b, 0x15f); // R43(0x57) Rout2 volume Must be 0x57(not 0x56)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2c, 0x79); // R44
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2d, 0x04); // R45
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x00); // R46
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x00); // R47
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2e, 0x0c); // R46 LM select PGA
//I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x18); // R47 Line Mix disconnected, Mix preamp gain +12db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x2f, 0x60); // R47 Mix preamp1 gain +30db
I2SCODEC_SendWmData(WM8753_ID_WR, 0x30, 0x02); // R48(0x60) Input control2
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x97); // R49
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x97); // R50
// I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x00); // R51
I2SCODEC_SendWmData(WM8753_ID_WR, 0x31, 0x13f); // R49(0x62)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x32, 0x13f); // R50(0x64)
I2SCODEC_SendWmData(WM8753_ID_WR, 0x33, 0x100); // R51(0x66) micbias 0.9AVDD, MIC1 select
I2SCODEC_SendWmData(WM8753_ID_WR, 0x34, 0x04); // R52
I2SCODEC_SendWmData(WM8753_ID_WR, 0x35, 0x00); // R53
I2SCODEC_SendWmData(WM8753_ID_WR, 0x36, 0x83); // R54
I2SCODEC_SendWmData(WM8753_ID_WR, 0x37, 0x24); // R55
I2SCODEC_SendWmData(WM8753_ID_WR, 0x38, 0x1ba); // R56
I2SCODEC_SendWmData(WM8753_ID_WR, 0x39, 0x00); // R57
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3a, 0x83); // R58
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3b, 0x24); // R59
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3c, 0x1ba); // R60
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3d, 0x00); // R61
I2SCODEC_SendWmData(WM8753_ID_WR, 0x3f, 0x00); // R63
/*headphone*/
I2SCODEC_SendWmData(WM8753_ID_WR, 0x16, 0x180); // R22(0x2c) Pwr mgt Lout1, Rout1
}
#endif
//end of file
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