csc_top.ucf

来自「采用FPGA实现色彩空间转换R’G’B’ to Y’CbCr的VHDL和veri」· UCF 代码 · 共 17 行

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# ************************
#   CSC constraints file
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# Global clock timespec
NET "Clock" TNM_NET = "Clock";
NET "Clock" PERIOD = 12.5 ns HIGH 50 %;
#
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# Input Setup time
OFFSET = IN 9.5 ns BEFORE "Clock";
#
# Output clock-to-out time
OFFSET = OUT 9.5 ns AFTER "Clock";
#