pck_crc7.vhd

来自「SD卡读卡器模块的VHDL及软件驱动代码」· VHDL 代码 · 共 44 行

library IEEE;
use IEEE.std_logic_1164.all;

-- generator polynomial: G(x) = x7 + x3 + 1

package pck_CRC7 is
	function nextCRC7
	(
		data:	std_logic;
		CRC:	std_logic_vector( 6 downto 0 )
	) return std_logic_vector;
end pck_CRC7;

package body pck_CRC7 is
	
	function nextCRC7
	(
		data:	std_logic;
		CRC:	std_logic_vector( 6 downto 0 )
	) return std_logic_vector is
		
		variable D:			std_logic;
		variable C:			std_logic_vector( 6 downto 0 );
		variable newCRC:	std_logic_vector( 6 downto 0 );
		
	begin
		
		D := data;
		C := CRC;
		
		newCRC(0) := D xor C(6);
		newCRC(1) := C(0);
		newCRC(2) := C(1);
		newCRC(3) := D xor C(2) xor C(6);
		newCRC(4) := C(3);
		newCRC(5) := C(4);
		newCRC(6) := C(5);
		
		return newCRC;
		
	end nextCRC7;
	
end pck_CRC7;