pck_crc16.vhd

来自「SD卡读卡器模块的VHDL及软件驱动代码」· VHDL 代码 · 共 55 行

library IEEE;
use IEEE.std_logic_1164.all;

-- generator polynomial G(x) = x16 + x12 +x5 +1

package pck_CRC16 is

	function nextCRC16
	(
		data:  std_logic;
		CRC:   std_logic_vector(15 downto 0)
	) return std_logic_vector;

end pck_CRC16;

package body pck_CRC16 is

	function nextCRC16
	(
		data:  std_logic;
		CRC:   std_logic_vector(15 downto 0)
	) return std_logic_vector is
		
		variable D:			std_logic;
		variable C:			std_logic_vector(15 downto 0);
		variable newCRC:	std_logic_vector(15 downto 0);
		
	begin
		
		D := data;
		C := CRC;
		
		newCRC(0) := D xor C(15);
		newCRC(1) := C(0);
		newCRC(2) := C(1);
		newCRC(3) := C(2);
		newCRC(4) := C(3);
		newCRC(5) := D xor C(4) xor C(15);
		newCRC(6) := C(5);
		newCRC(7) := C(6);
		newCRC(8) := C(7);
		newCRC(9) := C(8);
		newCRC(10) := C(9);
		newCRC(11) := C(10);
		newCRC(12) := D xor C(11) xor C(15);
		newCRC(13) := C(12);
		newCRC(14) := C(13);
		newCRC(15) := C(14);
		
		return newCRC;
		
	end nextCRC16;
	
end pck_CRC16;