📄 weitek.txt
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M+200Ch D(W): Pixel8 command
M+2014h D(W): Next_pixels command
M+2080h - M+20FCh D(W): Pixel1
Note: Writing to this register starts a Pixel1 command of (n+1) pixels,
where n is bits 2-6 of the address written to.
M+2184h D(R): Out of range (OOR) Register
bit 0 Set if y[0] is out of range
1 Set if y[1] is out of range
2 Set if y[2] is out of range
3 Set if y[3] is out of range
4 Set if x[0] is out of range
5 Set if x[1] is out of range
6 Set if x[2] is out of range
7 Set if x[3] is out of range
M+218Ch D(R/W): Cindex
bit 0-1 Selects one of the 4 X/Y coordinate register sets.
M+2190h D(R/W): Window Offset Register
bit 0-15 Y-offset of current window
16-31 X-offset of current window
M+2194h D(R): Parameter Engine Window Minimum Register
bit 0-12 Minimum Y value (top line). Pixels above this line are not drawn
16-28 Minimum X value (left edge). Pixels left of this are not drawn
Note: This register can be read and written at M+2220h
M+2198h D(R): Parameter Engine Window Maximum Register
bit 0-12 Minimum Y value (bottom line). Pixels below this line are not drawn
16-28 Minimum X value (right edge). Pixels right of this are not drawn
Note: This register can be read and written at M+2224h
M+21A0h D(R): Yclip
bit 0 Set if Y[0] > the window maximum (M+2224h)
1 Set if Y[1] > the window maximum (M+2224h)
2 Set if Y[2] > the window maximum (M+2224h)
3 Set if Y[3] > the window maximum (M+2224h)
4 Set if Y[0] < the window minimum (M+2220h)
5 Set if Y[1] < the window minimum (M+2220h)
6 Set if Y[2] < the window minimum (M+2220h)
7 Set if Y[3] < the window minimum (M+2220h)
M+21A4h D(R): Xclip
bit 0 Set if X[0] > the window maximum (M+2224h)
1 Set if X[1] > the window maximum (M+2224h)
2 Set if X[2] > the window maximum (M+2224h)
3 Set if X[3] > the window maximum (M+2224h)
4 Set if X[0] < the window minimum (M+2220h)
5 Set if X[1] < the window minimum (M+2220h)
6 Set if X[2] < the window minimum (M+2220h)
7 Set if X[3] < the window minimum (M+2220h)
M+21A8h D(R): Xedge_lt
bit 0 Set if X[0] > X[2]
1 Set if X[1] > X[3]
2 Set if X[3] > X[0]
3 Set if X[2] > X[3]
4 Set if X[1] > X[2]
5 Set if X[0] > X[1]
M+21ACh D(R): Xedge_gt
bit 0 Set if X[0] < X[2]
1 Set if X[1] < X[3]
2 Set if X[3] < X[0]
3 Set if X[2] < X[3]
4 Set if X[1] < X[2]
5 Set if X[0] < X[1]
M+21B0h D(R): Yedge_lt
bit 0 Set if Y[0] > Y[2]
1 Set if Y[1] > Y[3]
2 Set if Y[3] > Y[0]
3 Set if Y[2] > Y[3]
4 Set if Y[1] > Y[2]
5 Set if Y[0] > Y[1]
M+21B4h D(R): Yedge_gt
bit 0 Set if Y[0] < Y[2]
1 Set if Y[1] < Y[3]
2 Set if Y[3] < Y[0]
3 Set if Y[2] < Y[3]
4 Set if Y[1] < Y[2]
5 Set if Y[0] < Y[1]
M+2200h D(R/W): Foreground Color (fground) (9000)
bit 0-7 The foreground color used in drawing
M+2200h D(R/W): Color 0 (9100)
bit 0-31 Color0. For 8bpp modes repeat bits 0-7 in bits 8-15, 16-23 and
24-31, for 15/16bpp modes repeat bits 0-15 in bits 16-31.
M+2204h D(R/W): Background Color (bground)
bit 0-7 The background color used in drawing
M+2204 D(R/W): Color 1 (9100)
bit 0-31 Color1. For 8bpp modes repeat bits 0-7 in bits 8-15, 16-23 and
24-31, for 15/16bpp modes repeat bits 0-15 in bits 16-31.
M+2208h D(R/W): Plane Mask (pmask)
bit 0-7 Each bit enables the corresponding plane in the frame buffer if set
M+220Ch D(R/W): Draw mode (draw_mode)
bit 0 If set selects buffer 1 for all drawing operations, if clear
selects buffer 0
1 Must be set on writes for bit 0 to be updated. Reads as 1
2 If set suppresses all writes and sets the picked bit in the
Interrupt Register (M+0008h bit 2)
3 Must be set on writes for bit 2 to be updated. Reads as 1
M+2210h D(R/W): Pattern Origin X (Pat_originx)
bit 0-3 X origin of the pattern
M+2214h D(R/W): Pattern Origin Y (Pat_originy)
bit 0-3 Y origin of the pattern
M+2218h D(R/W): Raster Register (raster)
bit 0-7 (9100) The minterm to use for raster operations.
0-15 (9000) The minterm to use for raster operations.
13 (9100) Solid Color Disable. If set Solid Color is disabled and
Patterns enabled, if clear Solid Color is disabled and Patterns
are disabled.
14 (9100) Pattern Depth. 0: 2color, 1: 4color
15 (9100) Pixel1 Transparent. Enable Pixel1 transparent mode if set
16 If set Quad draw mode is Oversize mode, if clear X11 mode
17 If set enables the pattern (M+2280h - M+229Ch) for Quad draw
operations, if clear disables the pattern by forcing it to all 1's
M+221Ch D(R/W): Pixel8 Register (pixel8_reg)
bit 0-7? Excess data from the last pixel8 operation.
M+2220h D(R/W): Window Minimum Register (w_min)
bit 0-12 Minimum Y value (top line). Pixels above this line are not drawn
16-28 Minimum X value (left edge). Pixels left of this are not drawn
M+2224h D(R/W): Window Maximum Register (w_max)
bit 0-12 Minimum Y value (bottom line). Pixels below this line are not drawn
16-28 Minimum X value (right edge). Pixels right of this are not drawn
M+2238h D(R/W): Color2 (9100)
bit 0-31 Color2. For 8bpp modes repeat bits 0-7 in bits 8-15, 16-23 and
24-31, for 15/16bpp modes repeat bits 0-15 in bits 16-31.
M+223Ch D(R/W): Color 3 (9100)
bit 0-31 Color3. For 8bpp modes repeat bits 0-7 in bits 8-15, 16-23 and
24-31, for 15/16bpp modes repeat bits 0-15 in bits 16-31.
M+2280h D(R/W): Pattern 0/1 Register (9000)
M+2280h D(R/W): Pattern 0 (9100)
M+2284h D(R/W): Pattern 2/3 Register (9000)
M+2284h D(R/W): Pattern 1 (9100)
M+2288h D(R/W): Pattern 4/5 Register (9000)
M+2288h D(R/W): Pattern 2 (9100)
M+228Ch D(R/W): Pattern 6/7 Register (9000)
M+228Ch D(R/W): Pattern 3 (9100)
M+2290h D(R/W): Pattern 8/9 Register (9000)
M+2290h D(R/W): Software 0 (9100)
M+2294h D(R/W): Pattern 10/11 Register (9000)
M+2294h D(R/W): Software 1 (9100)
M+2298h D(R/W): Pattern 12/13 Register (9000)
M+2298h D(R/W): Software 2 (9100)
M+229Ch D(R/W): Pattern 14/15 Register (9000)
M+229Ch D(R/W): Software 3 (9100)
M+22A0h D(R/W): Byte Window Min (9100)
M+22A4h D(R/W): Byte Window Max (9100)
M+3000h - M+31FFh D(R/W): Device Coordinate Registers
bit 0-31 (Adr bit 3-4 = 1) 32bit X coordinate
0-31 (Adr bit 3-4 = 2) 32bit Y coordinate
0-15 (Adr bit 3-4 = 3) 16bit Y coordinate
16-31 (Adr bit 3-4 = 3) 16bit X coordinate
Note: When these registers are accessed the lower bits of address selects the
X/Y register and the form used as follows:
Address bits:
0-2 Should be 0
3-4 Selects the data: 1: 32bit X value, 2: 32bit Y value,
3: Y in lower 16 bits and X in upper 16 bits
5 If set the data (X/Y) is window relative (only valid for writes),
if clear the data is absolute
6-7 Selects the X/Y coordinate register:
0: X[0]/Y[0], 1: X[1]/Y[1], 2: X[2]/Y[2], 3: X[3]/Y[3]
Note: On the Power9000 these registers can probably also be accessed at
address: M+3400h - M+35FFh (M+181400h - M+1815FFh in Power9000 terms)
as bit 10 of the address is not decoded
M+3200h - M+33FFh D(W): Meta-Coordinate Pseudo regs
bit 0-31 (Adr bit 3-4 = 1) 32bit X coordinate
0-31 (Adr bit 3-4 = 2) 32bit Y coordinate
0-15 (Adr bit 3-4 = 3) 16bit Y coordinate
16-31 (Adr bit 3-4 = 3) 16bit X coordinate
Note: For these registers the data written is the coordinate(s) and the lower
bits of the address specify the drawing operation:
Address bits:
0-2 Should be 0
3-4 Selects the interpretation of the data written to the register.
1: 32bit X value, 2: 32bit Y value, 3: Y in lower 16 bits and
X in upper 16 bits
5 If set the coordinate is relative to the previous one, if clear
it is relative to the window offset
6-8 Type of operation. 0: Point, 1: Line, 2: Triangle,
3: Quadrilateral, 4: rectangle
Note: On the Power9000 these registers can probably also be accessed at
address: M+3600h - M+37FFh (M+181600h - M+1817FFh in Power9000 terms)
as bit 10 of the address is not decoded
4386-9h DAC
8386-9h DAC
C386-9h DAC
PCI Configuration space:
Byte 41h Bit 2 Set to access the DAC registers at A000h
Bit 3 Set to access the graphics engine registers at A000h
Memory Locations:
0:0487h (9100) Bit 4. Set for IBM RGB525 DAC, clear for Bt485 DAC
0:0489h (9100) Bit 5. Set for 4MB video memory, clear for 2MB
----------1DAA-------------------------------
INT 10 - VIDEO - Diamond Get System Info (Viper Pro)
AX = 1DAAh
BX = FDECh
Return: BX = CEDFh if Viper Pro (Weitek P9100)
AL = Memory Type:
01h: 1MB 8 128Kx8
02h: 2MB 8 256Kx8 or 16 256Kx4
04h: 4MB
10h: 1MB 8 256Kx4
AH = Bits 0-3 = DAC type:
0: Normal 8bit DAC
1: Sierra 15/16bit DAC
2: MUSIC MU9c1880/Diamond SS24
3: Brooktree Bt485
7: IBM RGB525
4 = VGA chip. 0: Weitek 5x86, 1: Oak OTI-087
5 = Bus type: 0: VLB bus, 1: PCI bus.
SI:DI -> Viper BIOS string
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