xga.txt

比较详尽的VGA端口寄存器的文档

             1 = Use mask boundary. The Mask Map X/Y Origin and Pixel Map 0
                 Width/Height registers define a rectangle. No pixel updates
                 will occur outside the rectangle.
             2 = Map Mask enabled. Pixels can only be updated if they are
                 inside the rectangle AND the corresponding bit in the map is
                 1.
    12-15  PATT_SRC. Selects the pattern.
             1 = Pixel Map A, 2 = Pixel Map B, 3 = pixel Map C,
             8 = Always ForeGround, 9 = Pattern from source data.
           The pattern selects whether the ForeGround or background data is
           used for the drawing operation.
    16-19  DST_MAP. Selects the destination map.
             1 = Pixel Map A, 2 = Pixel Map B, 3 = Pixel Map C
    20-23  SRC_MAP. Selects the source map.
             1 = Pixel Map A, 2 = Pixel Map B, 3 = Pixel Map C
    24-27  COMMAND. The draw command:
             2  = Short Stroke Read.
             3  = Line Draw Read.
             4  = Short Stroke Write. Puts the XGA in Short stroke mode. All
                  actual draws happen by writes to the Short Stroke register.
             5  = Line Draw Write. Writes a line in the destination map.
                  Line direction and length are set in the Bresenham and
                  Direction 1 registers.
             8  = BitBLT.
             9  = Inverting BitBLT.
            0Ah = Area Fill.
    28-29  FORE_SRC. The source of the ForeGround mix operation:
               0 = Foreground color, 2 = Source Pixel Map.
           The ForeGround source is effective when a pattern map is used, and
           the corresponding bit in the pattern is 1, or when the pattern
           source is given as Foreground.
    30-31  BACK_SRC. The source of the background mix operation:
               0 = Background color, 2 = Source Pixel Map.
           The background source is effective when a pattern map is used, and
           the corresponding bit in the pattern is 0.




  Video Modes:

    640x480   256 colors
    640x480 65536 colors
    800x600    16 colors
    800x600   256 colors
    800x600 65536 colors
   1024x768    16 colors
   1024x768   256 colors


   All modes use a linear address mode, where bits 16-23 of the address
   are in the Video Aperture Index register (xga+8), and the lower 16 bits
   are the offset from 0A000:0.

   In 16 color modes two pixels are stored in each byte. Even pixels are in
   bits 0-3 and odd pixels in bits 4-7.
   Address of pixel = (row *(pixels per row)+column) /2.

   In 256 color modes each pixel occupies a byte. The pixels are addressed
   in linear fashion. Address of pixel = row *(pixels per row) + column.

   In 65536 color modes each pixel occupies two bytes.
   Address of pixel = (row *(pixels per row)+column)*2.



VESA XGA Real Mode BIOS Specification:

----------104E00-------------------------
INT 10 - VESA XGA - Return XGA Environment Information
        AX = 4E00h
        ES:DI -> 256 byte buffer
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
Buffer is filled with environment information:
Offset Size    Description:
 00h  4 BYTEs  signature ('VESA')
 04h   WORD    VESA version. High byte is major version.
 06h   DWORD   Pointer to NULL terminated OEMstring.
 0Ah   DWORD   EnvironmentFlag:
                 bit 0-1  System BUS: 0 = MCA, 1 = ISA, 3 = EISA.
                       2  If set bus mastering is available.
                    3-31  Reserved.
 0Eh   WORD    Number of XGA installed. Functions 1-6 require a handle from
               0 to (XGAs -1) to identify the desired XGA board.
 10h - FFh     Reserved.
----------104E01----------------------------
INT 10 - VESA XGA - Return XGA Subsystem Information
        AX = 4E01h
        DX = XGA handle (0 to (XGAs -1))
        ES:DI -> 256 byte buffer.
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
Buffer is filled with environment information:
Offset Size    Description:
  00h  DWORD   Pointer to null-terminated board OEM string.
  04h  DWORD   Capabilities:
               bit 0-1  Board Bus Architecture: 0=MCA, 1=ISA, 3=EISA
                   2-3  Reserved
                   4-6  DMA Channel assigned for acquiring bus mastership
                        (only for ISA bus systems).
                     7  DMA Channel Status (ISA only). Enabled if set.
                  8-31  Reserved.
  08h  DWORD   Pointer to 8KB XGA ROM (or NULL).
  0Ch  DWORD   Pointer to the XGA memory mapped registers.
  10h  WORD    Base address of XGA I/O registers (21x0h)
  12h  DWORD   Pointer to start of physical video memory (0A000h:0 or
               0B000h:0)
  16h  DWORD   Physical address of 4MB aperture (or NULL if none).
  1Ah  DWORD   Physical address of 1MB aperture (or NULL if none).
  1Eh  DWORD   Physical address of 64KB aperture (or NULL if not enabled).
  22h  DWORD   Physical address of OEM aperture (or NULL if none).
  26h  WORD    Size of OEM aperture in 64KByte units.
  28h  DWORD   Pointer to list of video modes. The list is a series of WORDs
               terminated by 0FFFFh.
  2Ch  WORD    Number of 64KB blocks on the board.
  2Eh  DWORD   XGA manufactor ID. Byte 0 is POS data index 1, Byte 1 is index
               2 and byte 2 is 21xAh index 75h.
  32h - FFh    Reserved.
----------104E02-----------------------------------
INT 10 - VESA XGA - Return XGA Mode Information
        AX = 4E02h
        CX = Video mode
        DX = XGA handle
        ES:DI -> 256 byte buffer
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
Buffer is filled with mode information:
Offset Size    Description:
  00h  WORD    Attributes of the mode:
                 bit 0  If set the mode is supported
                     1  Reserved
                     2  If set output is supported by the BIOS
                     3  Reserved
                     4  If set this is a graphics mode (VGA registers
                        inactive, XGA active), if clear this is a text mode
                        (VGA registers active, XGA inactive)
  02h  WORD    Bytes per logical scanline
  04h  WORD    Horizontal Resolution in pixels
  06h  WORD    Vertical Resolution in scanlines
  08h  BYTE    Character Width in pixels
  09h  BYTE    Character Height in pixels
  0Ah  BYTE    Number of planes
  0Bh  BYTE    Bits per pixels
  0Ch  BYTE    Memory Model
                 0 = Text Mode
                 1 = CGA graphics
                 2 = Hercules graphics
                 3 = 4-planar graphics
                 4 = Packed Pixel
                 5 = Non-chain 4, 256 color
                 6 = Direct Color
                 7 = YUV-24
  0Dh  BYTE    Number of Image Pages
  0Eh  BYTE    Number of Red bits
  0Fh  BYTE    Bit Position of Red bit field
  10h  BYTE    Number of Green bits
  11h  BYTE    Bit Position of Green bit field
  12h  BYTE    Number of Blue bits
  13h  BYTE    Bit Position of Blue bit field
  14h  BYTE    Number of Reserved bits
  15h  BYTE    Bit Position of Reserved bit field
  16h - FFh    Reserved
----------104E03-----------------------------------
INT 10 - VESA XGA - Set XGA Video Mode
        AX = 4E03h
        BX = Video Mode
        CX = Other Command Flags
             bit 0  If clear the feature connector is set to the default state
        DX = XGA handle
        ES:DI -> 256 byte buffer
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
----------104E04-----------------------------------
INT 10 - VESA XGA - Return Current Video Mode
        AX = 4E04h
        DX = XGA handle
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
----------104E05-----------------------------------
INT 10 - VESA XGA - Set Feature Connector State
        AX = 4E05h
        BX = Feature Connector State
             bit 0  If set the Feature Connector is enabled.
                 1  If set Feature Connector is in Output Mode,
                    if clear in Input Mode
        DX = XGA handle
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
----------104E06-----------------------------------
INT 10 - VESA XGA - Return Feature Connector State
        AX = 4E06h
        DX = XGA handle
Return: AL = 4Eh if function supported.
        AH = 00h if function successful, errorcode if not.
        BX = Feature Connector State
             bit 0  If set the Feature Connector is enabled.
                 1  If set the Feature Connector is in Output Mode,
                    if clear in Input Mode.
              2-15  Reserved(0)


DMQS (Display Mode Query and Set) interface:
Not supported on the original IBM XGA, only on XGA-NI (non-interlaced) and
later models.
----------101F00-----------------------------
INT 10 - VIDEO - XGA - GET DMQS DATA LENGTH
        AX = 1F00h
Return: AL = 1Fh if supported
        BX = number of bytes of DMQS data
----------101F01-----------------------------
INT 10 - VIDEO - XGA - READ DMQS DATA
        AX = 1F01h
        ES:DI -> user buffer for return data (call AX=1F00h for size)
Return: AL = 1Fh if function supported
Format of XGA DMQS buffer:
Offset Size   Description
  00h  WORD   offset (in bytes) to DMQS data for next XGA instance
  02h  BYTE   slot number
  03h  BYTE   XGA implementation function level identifier
  04h  BYTE   XGA implementation resolution level identifier
  05h  WORD   vendor identifier - identifies card vendor
  07h  WORD   vendor defined field
  09h  WORD   XGA adapter I/O register base address
  0Bh  WORD   XGA coprocessor register base address
              (paragraph--multiply by 10h to get physical address)
  0Dh  WORD   1 Megabyte system video memory aperture
                 0000h if not allocated
              (Multiply by 100000h to get physical address)
  0Fh  WORD   4 Megabyte system video memory aperture
                 0000h if not allocated
              (multiply by 100000h to get physical address)
  11h  WORD   video memory base address
              (multiply by 100000h to get physical address)
  13h  WORD   composite ID of the attached display
  15h  BYTE   amount of video memory available, in multiples of 256K bytes
  16h  DWORD  alternate XGA coprocessor register base address.  0 = none.
  1Ah  var    DMQS Data for further XGA Instances (as above)
Note: "Instances" refers to the capability of having up to 8 XGA adapters in
      one computer.