xga.txt

比较详尽的VGA端口寄存器的文档

                FFh  Read the register two times more to get the 16bit vendor
                     ID. (low byte first).
           Any subsequent reads may return vendor specific information.
Note: This register may or may not be writable at the discretion of the
      vendor.

21xAh index 76h-77h.    RESERVED for manufactor expansion               (VESA)



Memory 00h  D(W):  Page Directory Base Address
bit  0-31  The Physical 32bit address of the current MMU Page Table for the
           current task. As this start at a 4KB page the lower 12 bit are 0.
           This register is active only if the ENAB_VIRT_LU bit in the Virtual
           Memory Control register (21x6h bit 0) is set. This register can
           only be written if the USER_SUPER bit (21xAh bit 2) is set.

Memory 04h  D(R):  Current Virtual Address
bit  0-31  If a VM Hardware Not Present or Protection interrupt occurs
           This register will contain the physical address of the page
           that caused the fault. Bits 0-11 will always be 0.
           This register is only active if the ENAB_VIRT_LU bit in the Virtual
           Memory Control register (21x6h bit 0) is set.

Memory 09h  (R):  Auxiliary Status Register                      (XGA-NI only)
bit     7  AUX_BUSY. If this bit is set the XGA drawing engine is busy.
           This is the same bit as the BUSY bit of the Control Register
           (Memory 11h bit 7), but reading this register does not block the
           drawing engine.

Memory 0Ch  (R):  State A Length
bit   0-7  The number of double words to read from the State A register
           (21xAh index 0Ch) to perform a task save.

Memory 0Dh  (R):  State B Length
bit   0-7  The number of double words to read from the State B register
           (21xAh index 0Dh) to perform a task save.

Memory 11h  (R/W):  Control Register
bit     1  STATE_SAVRST. Signals XGA state save/restore. If set the state can
           be restored, if clear the state can be saved. The SUSPND_OPER must
           be set.
        3  SUSPND_OPER. Set to 1 to suspend the XDA drawing operation. When
           the drawing operation has been suspended the OPER_SUSPND bit is
           set. To restart a suspended operation write 0 to this bit.
        4  (R) OPER_SUSPND. If set an XGA drawing operation is suspended.
        5  TERM_OPER. Set to 1 to terminate the current XGA operation.
           You must test for termination to complete, i.e.. until either the
           BUSY bit goes to 0, or the CMD_DONE_STAT bit of the Interrupt
           Status register (21x5h bit 7) is set.
        7  BUSY. If set the XGA drawing engine is busy. You should not write
           to any memory registers while this bit is set. On the XGA-NI you
           should check the AUX_BUSY bit of the Auxiliary Status Register
           (Memory 9h bit 7), as reading this register will temporarily stop
           the drawing engine.

Memory 12h  (W):  Pixel Map Index
bit   0-1  MAP_INDEX. Selects which Pixel map register set is accessed through
           Memory register 14h-1Ch.
             0 = Mask Map, 1 = Pixel Map A, 2 = Pixel Map B, 3 = Pixel Map C

Memory 14h  (W):  Pixel Map n Base
bit  0-31  The 32 bit address of the map. If the XGA is in VM mode (the
           ENAB_VIRT_LU bit in the Virtual Memory Control register (21x6h bit
           0) is set) the address must be a logical address, else a physical
           one. If using BitBLT operations combined with mixes or color
           compares, the map must start on a Double word address.

Memory 18h  W(W):  Pixel Map n Width
bit  0-15  The number of pixels (-1) in a scanline in the map.
           If using BitBLT operations combined with mixes or color compares,
           the width of the map must be a multiple of 4 bytes.

Memory 1Ah  W(W):  Pixel Map n height
bit  0-15  The number of lines (-1) in the map.

Memory 1Ch  (W):  Pixel Map n Format
bit   0-2  PIXEL_SIZE. Bits per pixel in the map:
              0 = 1 bit, 1 = 2 bits, 2 = 4 bits, 3 = 8 bits,
              4 = 16 bits (XGA-NI and some clones), 5 = 24 bits on some
           clones.
        3  PIX_FORMAT. If set the map is in Motorola format (Most significant
           byte stored first and lowest pixel in highest bit number), if clear
           in Intel format (Least significant byte stored first and lowest
           pixel in lowest bit number). In both cases each pixel has the least
           significant stored in the lowest bit number.

Memory 20h  W(R/W):  Bresenham Error Term
bit  0-15  Bresenham Error Term = 2 * (Delta Y) - (Delta X) - Fixup
           Fixup is either 0 or 1 depending on the direction of the line.
           This is a 2's complement number between -8192 and 8191

Memory 24h  W(W):  Bresenham Constant 1
bit  0-15  The Bresenham Constant 1 = 2 * (Delta Y)
           Known as "axial step constant"
           This is a 2's complement number between -8192 and 8191

Memory 28h  W(W):  Bresenham Constant 2
bit  0-15  The Bresenham Constant 2 = 2 * ((Delta Y) - (Delta X))
           Known as "diagonal step constant".
           This is a 2's complement number between -8192 and 8191

Memory 2Ch  D(W):  Short Stroke Register
bit   0-7  Stroke Code 1.  First vector
           bit 0-3  LENGTH. The length in pixels (0-15).
                 4  ACTION. If set the vector is drawn and the current
                    position is moved, if clear the current position is moved.
               5-7  VECDIR. Direction of the short stroke vector in degrees
                    counter-clockwise from the positive X-axis.
                    0=0, 1=45, 2=90, 3=135, 4=180, 5=225, 6=270, 7=315
     8-15  Stroke Code 2.  Second vector
    16-23  Stroke Code 3.  Third vector
    24-31  Stroke Code 4.  Fourth vector
Note: Before using this register the Command register (Memory 7Ch) must be
      loaded with a Short Stroke command, the source and destination maps
      setup and the start position set in the Destination Map X (Memory 78h)
      and Destination Map Y (Memory 7Ah) registers.
      To execute one stroke vector, load it in Stroke Code 4, to execute 2,
      load them in Stroke Code 3 & 4 and to execute 4 load them in all 4
      Strokes. A Stroke Code of 0 is a No-op.

Memory 48h  (W):  Foreground Mix
bit   0-7  The Foreground Mix:
              0  = 0 (All bits cleared).
              1  = Src AND Dst
              2  = Src AND (NOT Dst)
              3  = Src
              4  = (NOT Src) AND Dst
              5  = Dst
              6  = Src XOR Dst
              7  = Src OR Dst
              8  = (NOT Src) And (NOT Dst)
              9  = Src XOR (NOT Dst)
             0Ah = Not Dst
             0Bh = Src OR (NOT Dst)
             0Ch = NOT Src
             0Dh = (NOT Src) OR Dst
             0Eh = (NOT Src) or (NOT Dst)
             0Fh = 1 (all bits set)
             10h = MAX(Src,Dst)
             11h = MIN(Src,Dst)
             12h = Src + Dst  (with Saturate)
             13h = Dst - Src  (with Saturate)
             14h = Src - Dst  (with Saturate)
             15h = (Src + Dst)/2
           Src is the pixel from the color registers or the source map, Dst is
           pixel from the destination map. Saturate means that the result is
           limited by 0 and the max pixel value.

Memory 49h  (W):  Background Mix
bit   0-7  The Background Mix. Same values as the Foreground Mix (Memory 48h)

Memory 4Ah  (W):  Color Compare Function
bit   0-2  CC_COND. Color Compare condition on all pixel drawing operations:
              0  Always true
              1  Dst > CC
              2  Dst == CC
              3  Dst < CC
              4  Always false
              5  Dst >= CC
              6  Dst != CC
              7  Dst <= CC
            Dst refers to the pixel, and CC to the color specified in the
            Color Compare register (Memory 4Ch). The destination pixel is
            updated if the condition is false. The default setting of this
            register should be 4 (always false) in order to update all pixels.

Memory 4Ch  D(W):  Color Compare Color
bit  0-31  The color used in color compares.

Memory 50h  D(W):  Plane Mask
bit  0-31  This register can protect individual bits in a pixel from change by
           the drawing engine. A bit in a pixel can only be changed if the
           corresponding bit in this register is set.

Memory 54h  D(W):  Carry Chain Mask
bit  0-31  This register determines whether carries from arithmetic
           operations should be propagated to the next bit. If bit n is set
           any carry from the operations on bit n is propagated to bit n+1.

Memory 58h  D(W):  Foreground Color
bit  0-31  This is the ForeGround color for draw operations.

Memory 5Ch  D(W):  Background Color
bit  0-31  This is the background color for draw operations.

Memory 60h  W(W):  Operation Dimension 1
bit  0-15  For BitBLT operations this is the pixel width of the BitBLT
           operation. For line operations this is the pixel length of the line
           (-1). This can be calculated as: MAX(abs(Delta X),abs(Delta Y))
           The value must be between 0 and 4095.

Memory 62h  W(W):  Operation Dimension 2
bit  0-15  This is the line height of the BitBLT operation (-1).
           The value must be between 0 and 4095.

Memory 6Ch  W(W):  Mask Map Origin X Offset
bit  0-15  The X offset in pixels of the Mask Map within the Destination Map.
           The value must be between 0 and 4095.

Memory 6Eh  W(W):  Mask Map Origin Y Offset
bit  0-15  The Y offset in pixels of the Mask Map within the Destination Map.
           The value must be between 0 and 4095.

Memory 70h  W(R/W):  Source Map X
bit  0-15  The X position of the first pixel used within the Source Map.
           The value must be between 0 and 4095.

Memory 72h  W(R/W):  Source Map Y
bit  0-15  The Y position of the first pixel used within the Source Map.
           The value must be between 0 and 4095.

Memory 74h  W(R/W):  Pattern Map X
bit  0-15  The X position of the first pixel used within the Pattern Map.
           The value must be between 0 and 4095.

Memory 76h  W(R/W):  Pattern Map Y
bit  0-15  The Y position of the first pixel used within the Pattern Map.
           The value must be between 0 and 4095.

Memory 78h  W(R/W):  Destination Map X
bit  0-15  The X position of the first pixel used within the Destination Map.
           The value should be between -2048 and 6143 (2's complement).

Memory 7Ah  W(R/W):  Destination Map Y
bit  0-15  The Y position of the first pixel used within the Destination Map.
           The value should be between -2048 and 6143 (2's complement).

Memory 7Ch  D(W):  Command Register
bit   0-2  OCTANT. Selects the direction of line draws and BitBLTs.
             bit 0  YMAJOR. If set the line is longer in the Y dimension than
                    the X dimension. Not used for BitBLTs.
                 1  DEC_Y. If set the line is drawn in the negative Y
                    direction.
                 2  DEC_X. If set the line is drawn in the negative X
                    direction.
      4-5  DRAW_MODE. Selects the drawing mode for line and short stroke ops:
             0 = Draw all pixels.
             1 = Draw all but the first pixel
             2 = Draw all but the last pixel.
             3 = Draw area boundary.
      6-7  MASK_MODE. Selects the mask.
             0 = No mask.