📄 testbench.vhd
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WAIT FOR 50 ns; ELSE WAIT FOR 100 ns; END IF; WHEN bus_read => T_CENeg <= '0' ; T_WENeg <= '1'AFTER 10 ns; IF NOT disable THEN T_OENeg <= '0' AFTER 15 ns; ELSE T_OENeg <= '1'; END IF; IF NOT byte THEN T_DQ(15 downto 8) <= (OTHERS => 'Z'); END IF; T_DQ(7 downto 0) <= (OTHERS => 'Z'); WAIT FOR 100 ns; -- T_OENeg <= '1' ; ----------- END CASE; END PROCEDURE; --------------------------------------------------------------------------- --procedure to decode commands into specific bus command sequence --------------------------------------------------------------------------- PROCEDURE cmd_dc ( command : IN cmd_rec ) IS VARIABLE D_hi : NATURAL ;--RANGE 0 to MaxData; VARIABLE D_lo : NATURAL RANGE 0 to MaxData; VARIABLE Addr : NATURAL RANGE 0 to SecSize :=0; VARIABLE Addrfix : NATURAL RANGE 0 to SecSize/2:=0; VARIABLE Sect : INTEGER RANGE -1 to SecNum :=0; VARIABLE slv_1, slv_2 : std_logic_vector(7 downto 0); VARIABLE byte : boolean; VARIABLE i : NATURAL; BEGIN CASE command.cmd IS WHEN idle => bus_cycle(bus_cmd => bus_idle, byte => command.byte, disable => command.aux=disable); WHEN h_reset => bus_cycle(bus_cmd => bus_reset, byte => command.byte, tm => command.wtime); WHEN rd => bus_cycle(bus_cmd => bus_enable, byte => command.byte, data => -1, sector => command.sect, address => command.addr, tm => 90 ns); bus_cycle(bus_cmd => bus_read, byte => command.byte, data => -1, dataHi => -1, sector => command.sect, address => command.addr, disable => command.aux=disable); bus_cycle(bus_cmd => bus_output_disable, byte => command.byte); WHEN rd_page => bus_cycle(bus_cmd => bus_enable, byte => command.byte, data => -1, sector => 0, address => 0, tm => 90 ns); Addr := command.addr; Sect := command.sect; byte := command.byte; ---- 08July---- WAIT FOR 10 ns; -------------- i := 0; WHILE i < command.d_hi LOOP IF command.wtime > 0 ns THEN bus_cycle(bus_cmd => bus_output_disable, ---- byte => byte); ---- --byte toggle mode bus_cycle(bus_cmd => bus_enable, byte => byte, data => -1, sector => -1, tm => 10 ns); byte := false; bus_cycle(bus_cmd => bus_enable, byte => byte, data => -1, sector => -1, tm => 10 ns); Addrfix := Addr /2; IF Addr < SecSize THEN Addr := Addr+1; ELSE Addr := 0; IF Sect < SecNum THEN Sect := Sect+1; ELSE REPORT "No more locations to read !!!" SEVERITY warning; END IF; END IF; --word read; bus_cycle(bus_cmd => bus_read, byte => byte, data => -1, dataHi => -1, sector => Sect, address => Addrfix); bus_cycle(bus_cmd => bus_output_disable, ---- byte => byte); ---- bus_cycle(bus_cmd => bus_enable, byte => byte, data => -1, sector => -1, tm => 10 ns); byte := true; bus_cycle(bus_cmd => bus_enable, byte => byte, data => -1, sector => -1, tm => 30 ns); --first byte read bus_cycle(bus_cmd => bus_read, byte => byte, data => -1, dataHi => -1, sector => Sect, address => Addr); bus_cycle(bus_cmd => bus_output_disable, ---- byte => byte); ---- IF Addr < SecSize THEN Addr := Addr+1; ELSE Addr := 0; IF Sect < SecNum THEN Sect := Sect+1; ELSE REPORT "No more locations to read !!!" SEVERITY warning; END IF; END IF; i := i +3; wait for 10 ns; ------- ELSE byte := command.byte; END IF; --second byte read in byte toggle mode bus_cycle(bus_cmd => bus_read, byte => byte, data => -1, dataHi => -1, sector => Sect, address => Addr); IF Addr < SecSize THEN Addr := Addr+1; ELSE Addr := 0; IF Sect < SecNum THEN Sect := Sect+1; ELSE REPORT "No more locations to read !!!" SEVERITY warning; END IF; END IF; i := i +1; WAIT FOR 10 ns; END LOOP; bus_cycle(bus_cmd => bus_output_disable, byte => command.byte); WHEN w_cycle => D_lo := 16#AA# ; --first command data Addr := 16#AAA#; --first command byte address D_hi := 16#55#; --second command data Addrfix := 16#555#; --second command byte address IF NOT command.byte THEN --if word addressing Addr := 16#555#; --first command byte address Addrfix := 16#2AA#; --second command byte address END IF; bus_cycle(bus_cmd => bus_write, byte => command.byte, data => D_lo, dataHi => 0, sector => 0, address => Addr, violate => command.aux=violate, tm => command.wtime); bus_cycle(bus_cmd => bus_standby, byte => command.byte); bus_cycle(bus_cmd => bus_write, byte => command.byte, data => D_hi, dataHi => 0, sector => 0, address => Addrfix); bus_cycle(bus_cmd => bus_standby, byte => command.byte); WHEN w_reset | w_prog | w_erase | w_unlock | w_autoselect | w_enter_sec => Addr := 16#AAA#; IF NOT command.byte THEN --if word addressing Addr := 16#555#; --first command byte address END IF; CASE command.cmd IS WHEN w_reset => d_lo := 16#F0#; WHEN w_prog => d_lo := 16#A0#; WHEN w_erase => d_lo := 16#80#; WHEN w_unlock => d_lo := 16#20#; WHEN w_autoselect => d_lo := 16#90#; WHEN w_enter_sec => d_lo := 16#88#; WHEN OTHERS => d_lo := 0; END CASE; bus_cycle(bus_cmd => bus_write, byte => command.byte, data => d_lo, dataHi => 0, sector => 0, address => Addr); bus_cycle(bus_cmd => bus_standby, byte => command.byte); WHEN w_unlock_reset => Addr := 16#AAA#; --first command byte address IF NOT command.byte THEN --if word addressing Addr := 16#555#; --first command byte address END IF; bus_cycle(bus_cmd => bus_write, byte => command.byte, data => 16#90#, dataHi => 0, sector => 0, address => Addr); bus_cycle(bus_cmd => bus_standby, byte => command.byte); bus_cycle(bus_cmd => bus_write, byte => command.byte, data => 16#F0#, dataHi => 0, sector => 0, address => Addr); bus_cycle(bus_cmd => bus_standby, byte => command.byte); WHEN w_chip_ers => Addr := 16#AAA#; --first command byte address IF NOT command.byte THEN --if word addressing Addr := 16#555#; --first command byte address END IF; bus_cycle(bus_cmd => bus_write, byte => command.byte, data => 16#10#, dataHi => 0, sector => 0, Address => Addr); FOR i IN 0 TO SecNum LOOP IF Sec_Prot(i)/='1' THEN mem(i) := (OTHERS=>16#FF#); END IF; END LOOP; bus_cycle(bus_cmd => bus_standby, byte => command.byte); WHEN w_cfi => Addr := 16#AA#; --first command byte address IF NOT command.byte THEN --if word addressing Addr := 16#55#; --first command byte address
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