wushifp.vhd

电子课程设计数字钟的源代码

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

entity wushifp is
port (
CLK,rst: IN STD_LOGIC;
CNT: OUT STD_LOGIC);
end wushifp;

architecture fenpin of wushifp is
begin
 process(CLK ,rst)
   variable qn : integer range 49 downto 0;
 begin
   if rst='0' then 
       qn:=0;
   elsif CLK'event and CLK='1' then
     if qn<49 then
        qn:=qn+1;
     else qn:=0;
     end if;
   end if;
   if qn= 49 then CNT <='1';
     else CNT <= '0';
   end if;
 end process;
end fenpin;