add.tan.qmsg

该文档是基于QUARTUS2_6.0的Verilog试验例程

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version " "Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Nov 11 10:06:28 2007 " "Info: Processing started: Sun Nov 11 10:06:28 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off add -c add --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off add -c add --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "a sout 10.333 ns Longest " "Info: Longest tpd from source pin \"a\" to destination pin \"sout\" is 10.333 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns a 1 PIN PIN_26 2 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_26; Fanout = 2; PIN Node = 'a'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "" { a } "NODE_NAME" } } { "add.bdf" "" { Schematic "F:/wangbin/例程/新建文件夹/程序/add/add.bdf" { { 104 224 392 120 "a" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.089 ns) + CELL(0.114 ns) 6.672 ns inst 2 COMB LC_X1_Y4_N4 1 " "Info: 2: + IC(5.089 ns) + CELL(0.114 ns) = 6.672 ns; Loc. = LC_X1_Y4_N4; Fanout = 1; COMB Node = 'inst'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "5.203 ns" { a inst } "NODE_NAME" } } { "add.bdf" "" { Schematic "F:/wangbin/例程/新建文件夹/程序/add/add.bdf" { { 160 448 512 208 "inst" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.537 ns) + CELL(2.124 ns) 10.333 ns sout 3 PIN PIN_31 0 " "Info: 3: + IC(1.537 ns) + CELL(2.124 ns) = 10.333 ns; Loc. = PIN_31; Fanout = 0; PIN Node = 'sout'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "3.661 ns" { inst sout } "NODE_NAME" } } { "add.bdf" "" { Schematic "F:/wangbin/例程/新建文件夹/程序/add/add.bdf" { { 176 560 736 192 "sout" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.707 ns ( 35.88 % ) " "Info: Total cell delay = 3.707 ns ( 35.88 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.626 ns ( 64.12 % ) " "Info: Total interconnect delay = 6.626 ns ( 64.12 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "10.333 ns" { a inst sout } "NODE_NAME" } } { "d:/quartus2_setup/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus2_setup/win/Technology_Viewer.qrui" "10.333 ns" { a a~out0 inst sout } { 0.000ns 0.000ns 5.089ns 1.537ns } { 0.000ns 1.469ns 0.114ns 2.124ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Nov 11 10:06:28 2007 " "Info: Processing ended: Sun Nov 11 10:06:28 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}