zz.fit.qmsg

该文档是基于QUARTUS2_6.0的Verilog试验例程

{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0 0 "Finished moving registers into I/O cells, LUTs, and RAM blocks" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" {  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "9.407 ns register register " "Info: Estimated most critical path is register to register delay of 9.407 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns min\[7\] 1 REG LAB_X22_Y11 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X22_Y11; Fanout = 4; REG Node = 'min\[7\]'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "" { min[7] } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.153 ns) + CELL(0.575 ns) 1.728 ns Add1~409COUT1_444 2 COMB LAB_X23_Y10 2 " "Info: 2: + IC(1.153 ns) + CELL(0.575 ns) = 1.728 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Add1~409COUT1_444'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "1.728 ns" { min[7] Add1~409COUT1_444 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.808 ns Add1~411COUT1_445 3 COMB LAB_X23_Y10 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.808 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Add1~411COUT1_445'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add1~409COUT1_444 Add1~411COUT1_445 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.888 ns Add1~413COUT1_446 4 COMB LAB_X23_Y10 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.888 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Add1~413COUT1_446'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add1~411COUT1_445 Add1~413COUT1_446 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.968 ns Add1~415COUT1_447 5 COMB LAB_X23_Y10 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 1.968 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Add1~415COUT1_447'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add1~413COUT1_446 Add1~415COUT1_447 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 2.226 ns Add1~417 6 COMB LAB_X23_Y10 6 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 2.226 ns; Loc. = LAB_X23_Y10; Fanout = 6; COMB Node = 'Add1~417'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.258 ns" { Add1~415COUT1_447 Add1~417 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 2.905 ns Add1~400 7 COMB LAB_X23_Y10 4 " "Info: 7: + IC(0.000 ns) + CELL(0.679 ns) = 2.905 ns; Loc. = LAB_X23_Y10; Fanout = 4; COMB Node = 'Add1~400'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.679 ns" { Add1~417 Add1~400 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.077 ns) + CELL(0.575 ns) 4.557 ns Add5~118COUT1_134 8 COMB LAB_X24_Y9 2 " "Info: 8: + IC(1.077 ns) + CELL(0.575 ns) = 4.557 ns; Loc. = LAB_X24_Y9; Fanout = 2; COMB Node = 'Add5~118COUT1_134'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "1.652 ns" { Add1~400 Add5~118COUT1_134 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 4.637 ns Add5~122COUT1_135 9 COMB LAB_X24_Y9 2 " "Info: 9: + IC(0.000 ns) + CELL(0.080 ns) = 4.637 ns; Loc. = LAB_X24_Y9; Fanout = 2; COMB Node = 'Add5~122COUT1_135'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add5~118COUT1_134 Add5~122COUT1_135 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 4.717 ns Add5~120COUT1_136 10 COMB LAB_X24_Y9 2 " "Info: 10: + IC(0.000 ns) + CELL(0.080 ns) = 4.717 ns; Loc. = LAB_X24_Y9; Fanout = 2; COMB Node = 'Add5~120COUT1_136'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add5~122COUT1_135 Add5~120COUT1_136 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 4.797 ns Add5~124COUT1 11 COMB LAB_X24_Y9 2 " "Info: 11: + IC(0.000 ns) + CELL(0.080 ns) = 4.797 ns; Loc. = LAB_X24_Y9; Fanout = 2; COMB Node = 'Add5~124COUT1'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.080 ns" { Add5~120COUT1_136 Add5~124COUT1 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 5.055 ns Add5~128 12 COMB LAB_X24_Y9 3 " "Info: 12: + IC(0.000 ns) + CELL(0.258 ns) = 5.055 ns; Loc. = LAB_X24_Y9; Fanout = 3; COMB Node = 'Add5~128'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.258 ns" { Add5~124COUT1 Add5~128 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 5.734 ns Add5~125 13 COMB LAB_X24_Y9 4 " "Info: 13: + IC(0.000 ns) + CELL(0.679 ns) = 5.734 ns; Loc. = LAB_X24_Y9; Fanout = 4; COMB Node = 'Add5~125'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.679 ns" { Add5~128 Add5~125 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 40 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.064 ns) + CELL(0.590 ns) 6.388 ns always1~55 14 COMB LAB_X24_Y9 1 " "Info: 14: + IC(0.064 ns) + CELL(0.590 ns) = 6.388 ns; Loc. = LAB_X24_Y9; Fanout = 1; COMB Node = 'always1~55'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.654 ns" { Add5~125 always1~55 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.442 ns) 7.281 ns always1~0 15 COMB LAB_X25_Y9 2 " "Info: 15: + IC(0.451 ns) + CELL(0.442 ns) = 7.281 ns; Loc. = LAB_X25_Y9; Fanout = 2; COMB Node = 'always1~0'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.893 ns" { always1~55 always1~0 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.064 ns) + CELL(0.590 ns) 7.935 ns min\[19\]~2540 16 COMB LAB_X25_Y9 4 " "Info: 16: + IC(0.064 ns) + CELL(0.590 ns) = 7.935 ns; Loc. = LAB_X25_Y9; Fanout = 4; COMB Node = 'min\[19\]~2540'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "0.654 ns" { always1~0 min[19]~2540 } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.163 ns) + CELL(0.309 ns) 9.407 ns min\[16\] 17 REG LAB_X22_Y9 3 " "Info: 17: + IC(1.163 ns) + CELL(0.309 ns) = 9.407 ns; Loc. = LAB_X22_Y9; Fanout = 3; REG Node = 'min\[16\]'" {  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "1.472 ns" { min[19]~2540 min[16] } "NODE_NAME" } } { "shuzizhong.v" "" { Text "F:/wangbin/例程/新建文件夹/程序/shuzizhong/shuzizhong.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.435 ns ( 57.78 % ) " "Info: Total cell delay = 5.435 ns ( 57.78 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.972 ns ( 42.22 % ) " "Info: Total interconnect delay = 3.972 ns ( 42.22 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus2_setup/win/TimingClosureFloorplan.fld" "" "9.407 ns" { min[7] Add1~409COUT1_444 Add1~411COUT1_445 Add1~413COUT1_446 Add1~415COUT1_447 Add1~417 Add1~400 Add5~118COUT1_134 Add5~122COUT1_135 Add5~120COUT1_136 Add5~124COUT1 Add5~128 Add5~125 always1~55 always1~0 min[19]~2540 min[16] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 2 " "Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 2%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x14_y0 x27_y14 " "Info: The peak interconnect region extends from location x14_y0 to location x27_y14" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 14 08:40:45 2007 " "Info: Processing ended: Wed Nov 14 08:40:45 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "F:/wangbin/例程/新建文件夹/程序/shuzizhong/zz.fit.smsg " "Info: Generated suppressed messages file F:/wangbin/例程/新建文件夹/程序/shuzizhong/zz.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}