📄 opcode4.c
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#include "cpudefs.h"
#include "M68000.h"
extern int pending_interrupts;
void op_4000(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ BYTE src = regs.d[srcreg].B.l;
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
regs.d[srcreg].B.l = newv;
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}
void op_4010(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}
void op_4018(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
BYTE src = get_byte(srca);
{ regs.a[srcreg] += areg_byteinc[srcreg];
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}}
void op_4020(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ regs.a[srcreg] -= areg_byteinc[srcreg];
{ CPTR srca = regs.a[srcreg];
BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}}
void op_4028(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}
void op_4030(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = get_disp_ea(regs.a[srcreg]);
{ BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}}
void op_4038(void) /* NEGX */
{
{{ CPTR srca = (LONG)(WORD)nextiword();
BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}
void op_4039(void) /* NEGX */
{
{{ CPTR srca = nextilong();
BYTE src = get_byte(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_byte(srca,newv);
{ int flgs = ((BYTE)(src)) < 0;
int flgn = ((BYTE)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((BYTE)(newv)) != 0) ZFLG = 0;
NFLG = ((BYTE)(newv)) < 0;
}}}}}
void op_4040(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ WORD src = regs.d[srcreg].W.l;
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
regs.d[srcreg].W.l = newv;
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}
void op_4050(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}
void op_4058(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
WORD src = get_word(srca);
{ regs.a[srcreg] += 2;
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}}
void op_4060(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ regs.a[srcreg] -= 2;
{ CPTR srca = regs.a[srcreg];
WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}}
void op_4068(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}
void op_4070(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = get_disp_ea(regs.a[srcreg]);
{ WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}}
void op_4078(void) /* NEGX */
{
{{ CPTR srca = (LONG)(WORD)nextiword();
WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}
void op_4079(void) /* NEGX */
{
{{ CPTR srca = nextilong();
WORD src = get_word(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_word(srca,newv);
{ int flgs = ((WORD)(src)) < 0;
int flgn = ((WORD)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((WORD)(newv)) != 0) ZFLG = 0;
NFLG = ((WORD)(newv)) < 0;
}}}}}
void op_4080(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ LONG src = regs.d[srcreg].D;
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
regs.d[srcreg].D = (newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}
void op_4090(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}
void op_4098(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ regs.a[srcreg] += 4;
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}}
void op_40a0(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ regs.a[srcreg] -= 4;
{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}}
void op_40a8(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}
void op_40b0(void) /* NEGX */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = get_disp_ea(regs.a[srcreg]);
{ LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}}
void op_40b8(void) /* NEGX */
{
{{ CPTR srca = (LONG)(WORD)nextiword();
LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}
void op_40b9(void) /* NEGX */
{
{{ CPTR srca = nextilong();
LONG src = get_long(srca);
{ ULONG newv = 0 - src - (regs.x ? 1 : 0);
put_long(srca,newv);
{ int flgs = ((LONG)(src)) < 0;
int flgn = ((LONG)(newv)) < 0;
VFLG = (flgs && flgn);
regs.x = CFLG = (flgs || flgn);
if (((LONG)(newv)) != 0) ZFLG = 0;
NFLG = ((LONG)(newv)) < 0;
}}}}}
void op_40c0(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ MakeSR();
regs.d[srcreg].W.l = regs.sr;
}}}
void op_40d0(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
MakeSR();
put_word(srca,regs.sr);
}}}
void op_40d8(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg];
{ regs.a[srcreg] += 2;
MakeSR();
put_word(srca,regs.sr);
}}}}
void op_40e0(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ regs.a[srcreg] -= 2;
{ CPTR srca = regs.a[srcreg];
MakeSR();
put_word(srca,regs.sr);
}}}}
void op_40e8(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
MakeSR();
put_word(srca,regs.sr);
}}}
void op_40f0(void) /* MVSR2 */
{
ULONG srcreg = (opcode & 7);
{{ CPTR srca = get_disp_ea(regs.a[srcreg]);
MakeSR();
put_word(srca,regs.sr);
}}}
void op_40f8(void) /* MVSR2 */
{
{{ CPTR srca = (LONG)(WORD)nextiword();
MakeSR();
put_word(srca,regs.sr);
}}}
void op_40f9(void) /* MVSR2 */
{
{{ CPTR srca = nextilong();
MakeSR();
put_word(srca,regs.sr);
}}}
void op_4100(void) /* CHK */
{
ULONG srcreg = (opcode & 7);
ULONG dstreg = (opcode >> 9) & 7;
{ CPTR oldpc = m68k_getpc();
{ LONG src = regs.d[srcreg].D;
{ LONG dst = regs.d[dstreg].D;
if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4110(void) /* CHK */
{
ULONG srcreg = (opcode & 7);
ULONG dstreg = (opcode >> 9) & 7;
{ CPTR oldpc = m68k_getpc();
{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ LONG dst = regs.d[dstreg].D;
if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4118(void) /* CHK */
{
ULONG srcreg = (opcode & 7);
ULONG dstreg = (opcode >> 9) & 7;
{ CPTR oldpc = m68k_getpc();
{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ regs.a[srcreg] += 4;
{ LONG dst = regs.d[dstreg].D;
if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_4120(void) /* CHK */
{
ULONG srcreg = (opcode & 7);
ULONG dstreg = (opcode >> 9) & 7;
{ CPTR oldpc = m68k_getpc();
{ regs.a[srcreg] -= 4;
{ CPTR srca = regs.a[srcreg];
LONG src = get_long(srca);
{ LONG dst = regs.d[dstreg].D;
if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
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