opcode4.c

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void op_4410(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4418(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        BYTE src = get_byte(srca);
{       regs.a[srcreg] += areg_byteinc[srcreg];
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4420(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= areg_byteinc[srcreg];
{       CPTR srca = regs.a[srcreg];
        BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4428(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4430(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
{       BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4438(void) /* NEG */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4439(void) /* NEG */
{
{{      CPTR srca = nextilong();
        BYTE src = get_byte(srca);
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        put_byte(srca,dst);
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4440(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      WORD src = regs.d[srcreg].W.l;
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        regs.d[srcreg].W.l = dst;
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4450(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4458(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{       regs.a[srcreg] += 2;
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4460(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= 2;
{       CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4468(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4470(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
{       WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_4478(void) /* NEG */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4479(void) /* NEG */
{
{{      CPTR srca = nextilong();
        WORD src = get_word(srca);
{{ULONG dst = ((WORD)(0)) - ((WORD)(src));
        put_word(srca,dst);
        ZFLG = ((WORD)(dst)) == 0;
{       int flgs = ((WORD)(src)) < 0;
        int flgn = ((WORD)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UWORD)(src)) > ((UWORD)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4480(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      LONG src = regs.d[srcreg].D;
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        regs.d[srcreg].D = (dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4490(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}
void op_4498(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        LONG src = get_long(srca);
{       regs.a[srcreg] += 4;
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_44a0(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= 4;
{       CPTR srca = regs.a[srcreg];
        LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_44a8(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}
void op_44b0(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
{       LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}}
void op_44b8(void) /* NEG */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}
void op_44b9(void) /* NEG */
{
{{      CPTR srca = nextilong();
        LONG src = get_long(srca);
{{ULONG dst = ((LONG)(0)) - ((LONG)(src));
        put_long(srca,dst);
        ZFLG = ((LONG)(dst)) == 0;
{       int flgs = ((LONG)(src)) < 0;
        int flgn = ((LONG)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((ULONG)(src)) > ((ULONG)(0));
        NFLG = flgn != 0;
}}}}}}
void op_44c0(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      WORD src = regs.d[srcreg].W.l;
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_44d0(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_44d8(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{       regs.a[srcreg] += 2;
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}}
void op_44e0(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= 2;
{       CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}}
void op_44e8(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_44f0(void) /* MV2SR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
{       WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}}
void op_44f8(void) /* MV2SR */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_44f9(void) /* MV2SR */
{
{{      CPTR srca = nextilong();
        WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_44fa(void) /* MV2SR */
{
{{      CPTR srca = m68k_getpc();
        srca += (LONG)(WORD)nextiword();
{       WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}}
void op_44fb(void) /* MV2SR */
{
{{      CPTR srca = get_disp_ea(m68k_getpc());
{       WORD src = get_word(srca);
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}}
void op_44fc(void) /* MV2SR */
{
{{      WORD src = nextiword();
        MakeSR();
        regs.sr &= 0xFF00;
        regs.sr |= src & 0xFF;
        MakeFromSR();
}}}
void op_4600(void) /* NOT */
{
        ULONG srcreg = (opcode & 7);
{{      BYTE src = regs.d[srcreg].B.l;
{       ULONG dst = ~src;
        regs.d[srcreg].B.l = dst;
        CLEARFLGS;
		if ((BYTE)dst <= 0 )
		{
			if ((BYTE)dst == 0 )
				ZFLG = ZTRUE ;
12345

opcode4.c - 源码说明

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