📄 comm_arm.c.bak
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/*
*********************************************************************************************************
* Filename : COMM_ARM.C
* Programmer : Haven
* 描述： 串行口通信程序
* DATE: 2007.11.18
****************************************************************************************
*/
/*
*********************************************************************************************************
* INCLUDES
*********************************************************************************************************
*/
#include "..\includes\includes.H"
#define IER_RBR 0x01
#define IER_THRE 0x02
#define IER_RLS 0x04
#define IIR_PEND 0x01
#define IIR_RLS 0x03
#define IIR_RDA 0x02
#define IIR_CTI 0x06
#define IIR_THRE 0x01
#define LSR_RDR 0x01
#define LSR_OE 0x02
#define LSR_PE 0x04
#define LSR_FE 0x08
#define LSR_BI 0x10
#define LSR_THRE 0x20
#define LSR_TEMT 0x40
#define LSR_RXFE 0x80
volatile DWORD UART0Status;
volatile DWORD UART1Status;
volatile DWORD UART2Status;
volatile DWORD UART3Status;
extern DWORD install_irq( DWORD IntNumber, void *HandlerAddr, DWORD Priority );
/*
*********************************************************************************************************
* LOCAL GLOBAL VARIABLES
*********************************************************************************************************
*/
void CommUART0(void) __irq
{
CommISRHandler(COMM1);
}
void CommUART1(void) __irq
{
CommISRHandler(COMM2);
}
void CommUART2(void) __irq
{
CommISRHandler(COMM3);
}
void CommUART3(void) __irq
{
CommISRHandler(COMM4);
}
/*
*********************************************************************************************************
* COMM ISR HANDLER
*
* Description : UART中断服务程序
* Arguments : 'ch' 通道号
* COMM1
* COMM2
*********************************************************************************************************
*/
void CommISRHandler (INT8U ch)
{
INT8U c,err,i;
BYTE IIRValue, LSRValue;
switch(ch){
case COMM1:
IIRValue = U0IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ){ /* Receive Line Status */
LSRValue = U0LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) ){
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART0Status = LSRValue;
c = U0RBR;
VICVectAddr = 0; /* Acknowledge Interrupt */
return;
}
if ( LSRValue & LSR_RDR ){ /* Receive Data Ready */
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
c = U0RBR;
EvtPostQueISR(1,c,0);
TmrStartISR(0,1000);
}
}else if ( IIRValue == IIR_RDA ){ /* Receive Data Available */
/* Receive Data Available */
c = U0RBR;
EvtPostQueISR(1,c,0);
TmrStartISR(0,1000);
}else if ( IIRValue == IIR_CTI ){ /* Character timeout indicator */
/* Character Time-out indicator */
c = U0RBR;
EvtPostQueISR(1,c,0);
TmrStartISR(0,1000);
UART0Status |= 0x100; /* Bit 9 as the CTI error */
}else if ( IIRValue == IIR_THRE ){ /* THRE, transmit holding register empty */
/* THRE interrupt */
LSRValue = U0LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
c = CommGetTxChar(ch, &err);
if (err != COMM_TX_EMPTY) {
U0THR = c;
UART0TxEmpty = 0;
}else{
UART0TxEmpty = 1;
}
}
break;
case COMM2:
IIRValue = U1IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ){ /* Receive Line Status */
LSRValue = U1LSR;
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) ){
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART1Status = LSRValue;
c = U1RBR;
VICIntEnable = 1 << 2;
VICVectAddr = 0; /* Acknowledge Interrupt */
return;
}
if ( LSRValue & LSR_RDR ){ /* Receive Data Ready */
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(2,COMRX_SIG,0);
}
c = U1RBR;
CommPutRxChar(ch, c);
}
}else if ( IIRValue == IIR_RDA ){ /* Receive Data Available */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(2,COMRX_SIG,0);
}
for(i=0;i<8;i++){
c = U1RBR;
CommPutRxChar(ch, c);
}
}else if ( IIRValue == IIR_CTI ){ /* Character timeout indicator */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(2,COMRX_SIG,0);
}
c = U1RBR;
CommPutRxChar(ch, c);
UART1Status |= 0x100; /* Bit 9 as the CTI error */
}else if ( IIRValue == IIR_THRE ){ /* THRE, transmit holding register empty */
/* THRE interrupt */
LSRValue = U1LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
c = CommGetTxChar(ch, &err);
if (err != COMM_TX_EMPTY) {
U1THR = c;
UART1TxEmpty = 0;
}else{
UART1TxEmpty = 1;
}
}
break;
case COMM3:
IIRValue = U2IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ){ /* Receive Line Status */
LSRValue = U2LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) ){
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART0Status = LSRValue;
c = U2RBR;
VICVectAddr = 0; /* Acknowledge Interrupt */
return;
}
if ( LSRValue & LSR_RDR ){ /* Receive Data Ready */
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(3,COMRX_SIG,0);
}
c = U2RBR;
CommPutRxChar(ch, c);
}
}else if ( IIRValue == IIR_RDA ){ /* Receive Data Available */
/* Receive Data Available */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(3,COMRX_SIG,0);
}
//for(i=0;i<8;i++){
c = U2RBR;
CommPutRxChar(ch, c);
//}
}else if ( IIRValue == IIR_CTI ){ /* Character timeout indicator */
/* Character Time-out indicator */
UART2Status |= 0x100; /* Bit 9 as the CTI error */
}else if ( IIRValue == IIR_THRE ){ /* THRE, transmit holding register empty */
/* THRE interrupt */
LSRValue = U2LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
c = CommGetTxChar(ch, &err);
if (err != COMM_TX_EMPTY) {
U2THR = c;
UART2TxEmpty = 0;
}else{
UART2TxEmpty = 1;
}
}
break;
case COMM4:
IIRValue = U3IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if ( IIRValue == IIR_RLS ){ /* Receive Line Status */
LSRValue = U3LSR;
/* Receive Line Status */
if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) ){
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UART3Status = LSRValue;
c = U3RBR;
VICVectAddr = 0; /* Acknowledge Interrupt */
return;
}
if ( LSRValue & LSR_RDR ){ /* Receive Data Ready */
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(4,COMRX_SIG,0);
}
c = U3RBR;
CommPutRxChar(ch, c);
}
}else if ( IIRValue == IIR_RDA ){ /* Receive Data Available */
/* Receive Data Available */
if(CommIsRxEmptyISR(ch)){
EvtPostQueISR(4,COMRX_SIG,0);
}
c = U3RBR;
CommPutRxChar(ch, c);
}else if ( IIRValue == IIR_CTI ){ /* Character timeout indicator */
/* Character Time-out indicator */
UART3Status |= 0x100; /* Bit 9 as the CTI error */
}else if ( IIRValue == IIR_THRE ){ /* THRE, transmit holding register empty */
/* THRE interrupt */
LSRValue = U3LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
c = CommGetTxChar(ch, &err);
if (err != COMM_TX_EMPTY) {
U3THR = c;
UART3TxEmpty = 0;
}else{
UART3TxEmpty = 1;
}
}
break;
}
VICVectAddr = 0;
}
void CommTxIntEn (INT8U ch)
{
INT8U c,err;
c = CommGetTxChar(ch, &err);
switch (ch) {
case COMM1:
OS_EXIT_CRITICAL();
while(UART0TxEmpty == 0);
OS_ENTER_CRITICAL();
U0THR = c;
UART0TxEmpty = 0;
break;
case COMM2:
OS_EXIT_CRITICAL();
while(UART1TxEmpty == 0);
OS_ENTER_CRITICAL();
U1THR = c;
UART1TxEmpty = 0;
break;
case COMM3:
OS_EXIT_CRITICAL();
while(UART2TxEmpty == 0);
OS_ENTER_CRITICAL();
U2THR = c;
UART2TxEmpty = 0;
break;
case COMM4:
OS_EXIT_CRITICAL();
while(UART3TxEmpty == 0);
OS_ENTER_CRITICAL();
U3THR = c;
UART3TxEmpty = 0;
break;
}
}
BOOLEAN UARTInitCh1( INT32U baudrate )//UART0 INIT
{
INT32U Fdiv;
//PINSEL0 = 0x40500050;
//PINSEL1 = 0x003c0001;
PINSEL0 = PINSEL0&0xFFFFFF5F|0X00000050;
U0LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( Fpclk / 16 ) / baudrate ; /*baud rate */
U0DLM = Fdiv / 256;
U0DLL = Fdiv % 256;
U0LCR = 0x03; /* DLAB = 0 */
U0FCR = 0x07; /* Enable and reset TX and RX FIFO. */
if ( install_irq( UART0_INT, (void *)CommUART0, HIGHEST_PRIORITY ) == FALSE )
{
return (FALSE);
}
U0IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0 interrupt */
return (TRUE);
}
BOOLEAN UARTInitCh2( INT32U baudrate )//IO设置不对
{
INT32U Fdiv;
PINSEL0 = PINSEL0&0x7FFFFFFF|0X40000000;
PINSEL1 = PINSEL1&0XFFFFFFFE|0X00000001;
U1LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( Fpclk / 16 ) / baudrate ; /*baud rate */
U1DLM = Fdiv / 256;
U1DLL = Fdiv % 256;
U1LCR = 0x03; /* DLAB = 0 */
U1FCR = 0x87; /* Enable and reset TX and RX FIFO. */
if ( install_irq( UART1_INT, (void *)CommUART1, HIGHEST_PRIORITY+1 ) == FALSE )
{
return (FALSE);
}
U1IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART1 interrupt */
return (TRUE);
}
BOOLEAN UARTInitCh3( INT32U baudrate )//IO设置不对//UART2 INIT
{
INT32U Fdiv;
PINSEL0 = PINSEL0&0xFF5FFFFF|0X00500000;
PCONP = PCONP | (1<< 24);
U2LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( Fpclk / 16 ) / baudrate ; /*baud rate */
U2DLM = Fdiv / 256;
U2DLL = Fdiv % 256;
U2LCR = 0x03; /* DLAB = 0 */
U2FCR = 0x07; /* Enable and reset TX and RX FIFO. */
if ( install_irq( UART2_INT, (void *)CommUART2, HIGHEST_PRIORITY+2 ) == FALSE ){
return (FALSE);
}
U2IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART2 interrupt */
return (TRUE);
}
BOOLEAN UARTInitCh4( INT32U baudrate )//IO设置不对//UART2 INIT
{
INT32U Fdiv;
PINSEL1 = PINSEL1|0X003C0000;
PCONP = PCONP |(1<<25);
U3LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
Fdiv = ( Fpclk / 16 ) / baudrate ; /*baud rate */
U3DLM = Fdiv / 256;
U3DLL = Fdiv % 256;
U3LCR = 0x03; /* DLAB = 0 */
U3FCR = 0x07; /* Enable and reset TX and RX FIFO. */
if ( install_irq( UART3_INT, (void *)CommUART3, HIGHEST_PRIORITY+3 ) == FALSE ){
return (FALSE);
}
U3IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART3 interrupt */
return (TRUE);
}
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