seconddelay.vhd

此为VHDL实现的路口红绿灯控制例子

--------------------------------------------------------------------------------
-- Company:			Steepest Ascent
-- Engineer:		James A Bowman
--
-- Create Date:   
-- Design Name:   picoblaze_traffic_light  
-- Module Name:   seconddelay - Connectivity
-- Project Name:  XUP- PicoBlaze Traffic Light Example 
-- Target Device: XILINX Virtex II Pro XC2VP30
-- Tool versions:  
-- Description:
--
-- Dependencies:
-- 
-- Revision:		Version 1.0
-- Additional 
-- Comments:		None
-- 
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity seconddelay is
    Port ( clk : in std_logic;
	 		  reset: in std_logic;
           delay_count : in std_logic_vector(6 downto 0);
           delay_enable : in std_logic;
           delay_elapsed : out std_logic);
end seconddelay;


architecture connectivity of seconddelay is
--
-- declaration of clockdivider
--
	Component clockdivider
		Port ( clk        : in std_logic;
		       reset      : in std_logic;
             clk_divide : out std_logic);
	end Component;
--
-- declaration of countdelay
--
	Component countdelay
		Port ( delay_count   : in std_logic_vector(6 downto 0);
             delay_enable  : in std_logic;
			    clk           : in std_logic;
             delay_elapsed : out std_logic);
   end Component;


signal clk_divide: std_logic;

begin
	clock : clockdivider
	port map(        clk => clk,
					   reset => reset,
	          clk_divide => clk_divide);

   counter : countdelay
	port map(           clk => clk_divide,
				   delay_count => delay_count,
				  delay_enable => delay_enable,
				 delay_elapsed => delay_elapsed);

end connectivity;