asm_led.map.qmsg

本程序是一个用VHDL编写的数码管扫描显示控制器的设计与实现的程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Apr 27 16:14:04 2006 " "Info: Processing started: Thu Apr 27 16:14:04 2006" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off asm_led -c asm_led " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off asm_led -c asm_led" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "asm_led.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file asm_led.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 asm_led-lightarch " "Info: Found design unit 1: asm_led-lightarch" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 15 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 asm_led " "Info: Found entity 1: asm_led" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "transform.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file transform.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 transform-bav " "Info: Found design unit 1: transform-bav" {  } { { "transform.vhd" "" { Text "G:/实验4 吕/transform.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 transform " "Info: Found entity 1: transform" {  } { { "transform.vhd" "" { Text "G:/实验4 吕/transform.vhd" 8 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "asm_led " "Info: Elaborating entity \"asm_led\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "x asm_led.vhd(39) " "Warning (10492): VHDL Process Statement warning at asm_led.vhd(39): signal \"x\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 39 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "transform transform:u1 " "Info: Elaborating entity \"transform\" for hierarchy \"transform:u1\"" {  } { { "asm_led.vhd" "u1" { Text "G:/实验4 吕/asm_led.vhd" 22 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "IOPT_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_HDR" "" "Info: One or more bidirs are fed by always enabled tri-state buffers" { { "Info" "IOPT_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_SUB" "c\[0\] " "Info: Fan-out of permanently enabled tri-state buffer feeding bidir \"c\[0\]\" is moved to its source" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Fan-out of permanently enabled tri-state buffer feeding bidir \"%1!s!\" is moved to its source" 0 0} { "Info" "IOPT_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_SUB" "c\[1\] " "Info: Fan-out of permanently enabled tri-state buffer feeding bidir \"c\[1\]\" is moved to its source" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Fan-out of permanently enabled tri-state buffer feeding bidir \"%1!s!\" is moved to its source" 0 0} { "Info" "IOPT_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_SUB" "c\[2\] " "Info: Fan-out of permanently enabled tri-state buffer feeding bidir \"c\[2\]\" is moved to its source" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Fan-out of permanently enabled tri-state buffer feeding bidir \"%1!s!\" is moved to its source" 0 0} { "Info" "IOPT_MLS_FANOUT_MOVED_FOR_PERMANENTLY_ENABLED_TRI_SUB" "c\[3\] " "Info: Fan-out of permanently enabled tri-state buffer feeding bidir \"c\[3\]\" is moved to its source" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Fan-out of permanently enabled tri-state buffer feeding bidir \"%1!s!\" is moved to its source" 0 0}  } {  } 0 0 "One or more bidirs are fed by always enabled tri-state buffers" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "c\[3\]~reg0 data_in GND " "Warning: Reduced register \"c\[3\]~reg0\" with stuck data_in port to stuck value GND" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "c\[0\]~9 " "Warning: Node \"c\[0\]~9\"" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "c\[1\]~10 " "Warning: Node \"c\[1\]~10\"" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "c\[2\]~11 " "Warning: Node \"c\[2\]~11\"" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0} { "Warning" "WOPT_MLS_NODE_NAME" "c\[3\]~12 " "Warning: Node \"c\[3\]~12\"" {  } { { "asm_led.vhd" "" { Text "G:/实验4 吕/asm_led.vhd" 25 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0}  } {  } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clk " "Info: Promoted clock signal driven by pin \"clk\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "41 " "Info: Implemented 41 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "13 " "Info: Implemented 13 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_BIDIRS" "4 " "Info: Implemented 4 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0} { "Info" "ISCL_SCL_TM_MCELLS" "17 " "Info: Implemented 17 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0} { "Info" "ISCL_SCL_TM_SEXPS" "5 " "Info: Implemented 5 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 7 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 27 16:14:05 2006 " "Info: Processing ended: Thu Apr 27 16:14:05 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}