📄 asm_led.vhd
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Library IEEE;
--Declaration of using STD_LOGIC_1164 package
Use IEEE.std_logic_1164.all;
Use IEEE.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity asm_led is
port(
clk: in STD_LOGIC;
reset: in STD_LOGIC;
c:inout std_logic_vector(3 downto 0);
catn: out STD_LOGIC_VECTOR(5 downto 0);
d:out std_logic_vector(6 downto 0));
end asm_led;
architecture lightarch of asm_led is
signal x:std_logic_vector(5 downto 0):="111111";
component transform
Port( ai:in std_logic_vector(3 downto 0);
b:out std_logic_vector(6 downto 0));
End component transform;
begin
u1: transform port map(c,d);
process (clk,reset)
begin
if (reset='1') then
catn<="111111";
elsif (clk'event and clk='1')then
case x is
when"111111"=>x<="111110";c<="0000";
when"111110"=>x<="111101";c<="0001";
when"111101"=>x<="111011";c<="0010";
when"111011"=>x<="110111";c<="0011";
when"110111"=>x<="101111";c<="0100";
when"101111"=>x<="011111";c<="0101";
when"011111"=>x<="111110";c<="0000";
when others=>x<="111110";c<="0000";
end case ;
end if;
catn<=x;
end process;
end;
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