seg7_b.map.eqn

这是一个用VHDL语言编写的数字电路程序

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--A1L3 is a2[0]~28
A1L3_or_out = a2[0];
A1L3 = A1L3_or_out;


--A1L5 is a2[1]~30
A1L5_or_out = a2[1];
A1L5 = A1L5_or_out;


--A1L7 is a2[2]~32
A1L7_or_out = a2[2];
A1L7 = A1L7_or_out;


--A1L9 is a2[3]~34
A1L9_or_out = a2[3];
A1L9 = A1L9_or_out;


--B1L3 is seg7:comp1|b1_out[2]~972
B1L3_p1_out = a2[2] & !a2[1];
B1L3_p2_out = a2[1] & a2[3];
B1L3_or_out = B1L3_p1_out # B1L3_p2_out # a2[0];
B1L3 = !(B1L3_or_out);


--B1L1 is seg7:comp1|b1_out[0]~979
B1L1_p1_out = !a2[0] & a2[2] & !a2[3];
B1L1_p2_out = a2[2] & !a2[3] & !a2[1];
B1L1_p3_out = !a2[2] & !a2[3] & a2[1];
B1L1_p4_out = !a2[2] & a2[3] & !a2[1];
B1L1_or_out = B1L1_p1_out # B1L1_p2_out # B1L1_p3_out # B1L1_p4_out;
B1L1 = B1L1_or_out;


--B1L2 is seg7:comp1|b1_out[1]~984
B1L2_p1_out = a2[3] & a2[2];
B1L2_p2_out = !a2[3] & !a2[2] & a2[0];
B1L2_p3_out = a2[0] & a2[1];
B1L2_p4_out = !a2[2] & a2[1];
B1L2_or_out = B1L2_p1_out # B1L2_p2_out # B1L2_p3_out # B1L2_p4_out;
B1L2 = !(B1L2_or_out);


--B1L6 is seg7:comp1|b1_out[4]~989
B1L6_p1_out = !a2[0] & a2[1] & !a2[2];
B1L6_p2_out = a2[1] & a2[3];
B1L6_p3_out = a2[2] & a2[3];
B1L6_or_out = B1L6_p1_out # B1L6_p2_out # B1L6_p3_out;
B1L6 = !(B1L6_or_out);


--B1L7 is seg7:comp1|b1_out[5]~995
B1L7_p1_out = a2[3] & a2[1];
B1L7_p2_out = a2[3] & a2[2];
B1L7_p3_out = !a2[1] & a2[2] & a2[0];
B1L7_p4_out = a2[1] & a2[2] & !a2[0];
B1L7_or_out = B1L7_p1_out # B1L7_p2_out # B1L7_p3_out # B1L7_p4_out;
B1L7 = !(B1L7_or_out);


--B1L4 is seg7:comp1|b1_out[3]~1001
B1L4_p1_out = !a2[0] & !a2[2] & !a2[1];
B1L4_p2_out = !a2[2] & !a2[1] & a2[3];
B1L4_p3_out = a2[0] & a2[2] & !a2[3];
B1L4_p4_out = a2[1] & !a2[3];
B1L4_or_out = B1L4_p1_out # B1L4_p2_out # B1L4_p3_out # B1L4_p4_out;
B1L4 = B1L4_or_out;


--B1L5 is seg7:comp1|b1_out[3]~1007
B1L5_p0_out = a2[1] & a2[3];
B1L5_p1_out = a2[0] & a2[2] & a2[1];
B1L5_p2_out = a2[0] & !a2[2] & !a2[1] & !a2[3];
B1L5_p3_out = !a2[0] & a2[2] & !a2[1];
B1L5_p4_out = a2[2] & a2[3];
B1L5_or_out = B1L5_p0_out # B1L5_p1_out # B1L5_p2_out # B1L5_p3_out # B1L5_p4_out;
B1L5 = !(B1L5_or_out);


--~GND~0 is ~GND~0
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~VCC~0 is ~VCC~0
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--~VCC~3 is ~VCC~3
~VCC~3_or_out = GND;
~VCC~3 = !(~VCC~3_or_out);


--~VCC~4 is ~VCC~4
~VCC~4_or_out = GND;
~VCC~4 = !(~VCC~4_or_out);


--a2[0] is a2[0]
--operation mode is input

a2[0] = INPUT();


--a2[1] is a2[1]
--operation mode is input

a2[1] = INPUT();


--a2[2] is a2[2]
--operation mode is input

a2[2] = INPUT();


--a2[3] is a2[3]
--operation mode is input

a2[3] = INPUT();


--catn[0] is catn[0]
--operation mode is output

catn[0] = OUTPUT(~GND~0);


--catn[1] is catn[1]
--operation mode is output

catn[1] = OUTPUT(~VCC~0);


--catn[2] is catn[2]
--operation mode is output

catn[2] = OUTPUT(~VCC~1);


--catn[3] is catn[3]
--operation mode is output

catn[3] = OUTPUT(~VCC~2);


--catn[4] is catn[4]
--operation mode is output

catn[4] = OUTPUT(~VCC~3);


--catn[5] is catn[5]
--operation mode is output

catn[5] = OUTPUT(~VCC~4);


--c2[0] is c2[0]
--operation mode is output

c2[0] = OUTPUT(A1L3);


--c2[1] is c2[1]
--operation mode is output

c2[1] = OUTPUT(A1L5);


--c2[2] is c2[2]
--operation mode is output

c2[2] = OUTPUT(A1L7);


--c2[3] is c2[3]
--operation mode is output

c2[3] = OUTPUT(A1L9);


--b2[2] is b2[2]
--operation mode is output

b2[2] = OUTPUT(B1L3);


--b2[0] is b2[0]
--operation mode is output

b2[0] = OUTPUT(B1L1);


--b2[1] is b2[1]
--operation mode is output

b2[1] = OUTPUT(B1L2);


--b2[4] is b2[4]
--operation mode is output

b2[4] = OUTPUT(B1L6);


--b2[5] is b2[5]
--operation mode is output

b2[5] = OUTPUT(B1L7);


--b2[6] is b2[6]
--operation mode is output

b2[6] = OUTPUT(B1L4);


--b2[3] is b2[3]
--operation mode is output

b2[3] = OUTPUT(B1L5);