📄 itemnew3_2.fit.rpt
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+--------------------+-------+
+-----------------------------------------------------------------------------------------------+
; Advanced Data - Placement Preparation ;
+-----------------------------------------------------------------------------+-----------------+
; Name ; Value ;
+-----------------------------------------------------------------------------+-----------------+
; Mid Wire Use - Fit Attempt 1 ; 20 ;
; Mid Slack - Fit Attempt 1 ; -8598 ;
; Internal Atom Count - Fit Attempt 1 ; 68 ;
; LE/ALM Count - Fit Attempt 1 ; 68 ;
; LAB Count - Fit Attempt 1 ; 9 ;
; Outputs per Lab - Fit Attempt 1 ; 6.778 ;
; Inputs per LAB - Fit Attempt 1 ; 4.222 ;
; Global Inputs per LAB - Fit Attempt 1 ; 1.556 ;
; LAB Constraint 'non-global clock / CE pair + async load' - Fit Attempt 1 ; 0:8;1:1 ;
; LAB Constraint 'ce + sync load' - Fit Attempt 1 ; 0:2;1:7 ;
; LAB Constraint 'non-global controls' - Fit Attempt 1 ; 0:2;1:5;2:2 ;
; LAB Constraint 'un-route combination' - Fit Attempt 1 ; 0:2;1:5;2:2 ;
; LAB Constraint 'non-global with asyn_clear' - Fit Attempt 1 ; 0:1;1:3;2:5 ;
; LAB Constraint 'un-route with async_clear' - Fit Attempt 1 ; 0:1;1:3;2:5 ;
; LAB Constraint 'non-global async clear + sync clear' - Fit Attempt 1 ; 0:8;1:1 ;
; LAB Constraint 'global non-clock/non-asynch_clear' - Fit Attempt 1 ; 0:8;1:1 ;
; LAB Constraint 'ygr_cl_ngclk_gclkce_sload_aload_constraint' - Fit Attempt 1 ; 0:2;1:6;2:1 ;
; LAB Constraint 'global control signals' - Fit Attempt 1 ; 0:1;1:3;2:3;3:2 ;
; LAB Constraint 'clock / ce pair constraint' - Fit Attempt 1 ; 0:1;1:5;2:3 ;
; LAB Constraint 'aload_aclr pair with aload used' - Fit Attempt 1 ; 0:8;1:1 ;
; LAB Constraint 'aload_aclr pair' - Fit Attempt 1 ; 0:1;1:3;2:5 ;
; LAB Constraint 'sload_sclear pair' - Fit Attempt 1 ; 0:9 ;
; LAB Constraint 'invert_a constraint' - Fit Attempt 1 ; 0:3;1:6 ;
; LAB Constraint 'has placement constraint' - Fit Attempt 1 ; 0:6;1:3 ;
; LEs in Chains - Fit Attempt 1 ; 29 ;
; LEs in Long Chains - Fit Attempt 1 ; 21 ;
; LABs with Chains - Fit Attempt 1 ; 4 ;
; LABs with Multiple Chains - Fit Attempt 1 ; 0 ;
; Time - Fit Attempt 1 ; 0 ;
; Time in tsm_dat.dll - Fit Attempt 1 ; 0.016 ;
+-----------------------------------------------------------------------------+-----------------+
+---------------------------------------------+
; Advanced Data - Placement ;
+-------------------------------------+-------+
; Name ; Value ;
+-------------------------------------+-------+
; Early Wire Use - Fit Attempt 1 ; 3 ;
; Early Slack - Fit Attempt 1 ; -7067 ;
; Mid Wire Use - Fit Attempt 1 ; 7 ;
; Mid Slack - Fit Attempt 1 ; -7060 ;
; Late Wire Use - Fit Attempt 1 ; 8 ;
; Late Slack - Fit Attempt 1 ; -5808 ;
; Time - Fit Attempt 1 ; 1 ;
; Time in tsm_dat.dll - Fit Attempt 1 ; 0.110 ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.189 ;
+-------------------------------------+-------+
+---------------------------------------------+
; Advanced Data - Routing ;
+-------------------------------------+-------+
; Name ; Value ;
+-------------------------------------+-------+
; Early Slack - Fit Attempt 1 ; -6493 ;
; Early Wire Use - Fit Attempt 1 ; 5 ;
; Peak Regional Wire - Fit Attempt 1 ; 5 ;
; Mid Slack - Fit Attempt 1 ; -7111 ;
; Late Slack - Fit Attempt 1 ; -7111 ;
; Late Slack - Fit Attempt 1 ; -7111 ;
; Late Wire Use - Fit Attempt 1 ; 7 ;
; Time - Fit Attempt 1 ; 0 ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.061 ;
+-------------------------------------+-------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.1 Build 176 10/26/2005 SJ Web Edition
Info: Processing started: Tue Aug 19 10:25:28 2008
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off itemnew3_2 -c itemnew3_2
Info: Selected device EPM240T100C5 for design "itemnew3_2"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
Info: Device EPM240T100I5 is compatible
Info: Device EPM570T100C5 is compatible
Info: Device EPM570T100I5 is compatible
Info: No exact pin location assignment(s) for 32 pins of 32 total pins
Info: Pin num_a[0] not assigned to an exact location on the device
Info: Pin num_a[1] not assigned to an exact location on the device
Info: Pin num_a[2] not assigned to an exact location on the device
Info: Pin num_a[3] not assigned to an exact location on the device
Info: Pin num_a[4] not assigned to an exact location on the device
Info: Pin num_a[5] not assigned to an exact location on the device
Info: Pin num_a[6] not assigned to an exact location on the device
Info: Pin num_a[7] not assigned to an exact location on the device
Info: Pin num_clk[0] not assigned to an exact location on the device
Info: Pin num_clk[1] not assigned to an exact location on the device
Info: Pin num_clk[2] not assigned to an exact location on the device
Info: Pin num_clk[3] not assigned to an exact location on the device
Info: Pin num_clk[4] not assigned to an exact location on the device
Info: Pin num_clk[5] not assigned to an exact location on the device
Info: Pin num_clk[6] not assigned to an exact location on the device
Info: Pin num_clk[7] not assigned to an exact location on the device
Info: Pin num_clk[8] not assigned to an exact location on the device
Info: Pin num_clk[9] not assigned to an exact location on the device
Info: Pin num_clk[10] not assigned to an exact location on the device
Info: Pin num_clk[11] not assigned to an exact location on the device
Info: Pin num_clk[12] not assigned to an exact location on the device
Info: Pin num_clk[13] not assigned to an exact location on the device
Info: Pin num_clk[14] not assigned to an exact location on the device
Info: Pin num_clk[15] not assigned to an exact location on the device
Info: Pin num_clk[16] not assigned to an exact location on the device
Info: Pin num_clk[17] not assigned to an exact location on the device
Info: Pin num_clk[18] not assigned to an exact location on the device
Info: Pin num_clk[19] not assigned to an exact location on the device
Info: Pin num_clk[20] not assigned to an exact location on the device
Info: Pin int0 not assigned to an exact location on the device
Info: Pin a not assigned to an exact location on the device
Info: Pin clk not assigned to an exact location on the device
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1000 MHz
Info: Assuming a global tsu requirement of 2.0 ns
Info: Assuming a global tco requirement of 1.0 ns
Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "a" to use Global clock in PIN 14
Info: Automatically promoted signal "clk" to use Global clock in PIN 12
Info: Automatically promoted some destinations of signal "once" to use Global clock
Info: Destination "int0" may be non-global or may not use global clock
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement
Info: Number of I/O pins in group: 30 (unused VREF, 3.30 VCCIO, 0 input, 30 output, 0 bidirectional)
Info: I/O standards used: LVTTL.
Info: I/O bank details before I/O pin placement
Info: Statistics of I/O banks
Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 2 total pin(s) used -- 36 pins available
Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 42 pins available
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations begi
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