key_matix44.flow.rpt

FPGA EP1C6Q240C8 4*4键盘模块 4*4矩阵键盘

Flow report for key_matix44
Fri Dec 05 12:41:25 2008
Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Flow Summary
  3. Flow Settings
  4. Flow Non-Default Global Settings
  5. Flow Elapsed Time
  6. Flow Log



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------------+
; Flow Summary                                                        ;
+--------------------------+------------------------------------------+
; Flow Status              ; Successful - Fri Dec 05 12:41:25 2008    ;
; Quartus II Version       ; 8.0 Build 215 05/29/2008 SJ Full Version ;
; Revision Name            ; key_matix44                              ;
; Top-level Entity Name    ; key_matrix44                             ;
; Family                   ; Cyclone                                  ;
; Device                   ; EP1C6Q240C8                              ;
; Timing Models            ; Final                                    ;
; Met timing requirements  ; No                                       ;
; Total logic elements     ; 55 / 5,980 ( < 1 % )                     ;
; Total pins               ; 11 / 185 ( 6 % )                         ;
; Total virtual pins       ; 0                                        ;
; Total memory bits        ; 0 / 92,160 ( 0 % )                       ;
; DSP block 9-bit elements ; N/A until Partition Merge                ;
; Total PLLs               ; 0 / 2 ( 0 % )                            ;
; Total DLLs               ; N/A until Partition Merge                ;
+--------------------------+------------------------------------------+


+-----------------------------------------+
; Flow Settings                           ;
+-------------------+---------------------+
; Option            ; Setting             ;
+-------------------+---------------------+
; Start date & time ; 12/05/2008 12:41:06 ;
; Main task         ; Compilation         ;
; Revision Name     ; key_matix44         ;
+-------------------+---------------------+


+---------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings                                                                              ;
+------------------------------------+------------------------------+---------------+--------------+------------+
; Assignment Name                    ; Value                        ; Default Value ; Entity Name  ; Section Id ;
+------------------------------------+------------------------------+---------------+--------------+------------+
; COMPILER_SIGNATURE_ID              ; 107930626853.122845206603212 ; --            ; --           ; --         ;
; PARTITION_COLOR                    ; 14622752                     ; --            ; key_matrix44 ; Top        ;
; PARTITION_NETLIST_TYPE             ; SOURCE                       ; --            ; key_matrix44 ; Top        ;
; TOP_LEVEL_ENTITY                   ; key_matrix44                 ; key_matix44   ; --           ; --         ;
; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off                          ; --            ; --           ; eda_palace ;
+------------------------------------+------------------------------+---------------+--------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time                                                                                                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis    ; 00:00:04     ; 1.0                     ; 178 MB              ; 00:00:03                           ;
; Fitter                  ; 00:00:04     ; 1.0                     ; 167 MB              ; 00:00:03                           ;
; Assembler               ; 00:00:02     ; 1.0                     ; 145 MB              ; 00:00:02                           ;
; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 108 MB              ; 00:00:01                           ;
; Total                   ; 00:00:11     ; --                      ; --                  ; 00:00:09                           ;
+-------------------------+--------------+-------------------------+---------------------+------------------------------------+


------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off key_matix44 -c key_matix44
quartus_fit --read_settings_files=off --write_settings_files=off key_matix44 -c key_matix44
quartus_asm --read_settings_files=off --write_settings_files=off key_matix44 -c key_matix44
quartus_tan --read_settings_files=off --write_settings_files=off key_matix44 -c key_matix44 --timing_analysis_only