📄 altrfir32.mdl
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Coef6Value "0"
Coef7Value "0"
HDLInputPortsMappingAltera "dataa(0).1.0.b,dataa(1).1.0.b,dataa(2).1.0.b"
",dataa(3).1.0.b"
HDLOutputPortsMappingAltera "result.13.0.s"
HDLImplicitPortsMappingAltera "clock.VCC, sclr.GND, ena.VCC"
HDLParameterMappingAltera "coef0.\"11000100001\".std_logic_vector,coef1."
"\"10110101110\".std_logic_vector,coef2.\"10111110010\".std_logic_vector,coef3"
".\"11010100000\".std_logic_vector,coef4.\"00000000000\".std_logic_vector,coef"
"5.\"00000000000\".std_logic_vector,coef6.\"00000000000\".std_logic_vector,coe"
"f7.\"00000000000\".std_logic_vector,lpm_widthcoef.11.positive,pipeline.0.natu"
"ral,NumberOfInputBits.4.natural,lpm_widthr.13.positive"
HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbuilde"
"rblock.all;"
HDLComponentNameAltera "sMultiBitAddSub"
}
Block {
BlockType Reference
Name "Bit Level \nSum of Product6"
Ports [4, 1]
Position [640, 857, 700, 933]
ForegroundColor "blue"
SourceBlock "arithm_alteradspbuilder/Bit Level \nSum of Prod"
"uct"
SourceType "HDLEntity AlteraBlockSet"
ntap_altr "4"
bwl "9"
CoefficientValues "[FpCoef(29:32)]"
RegisterInputs off
Coef0Value "-146"
Coef1Value "29"
Coef2Value "140"
Coef3Value "177"
Coef4Value "0"
Coef5Value "0"
Coef6Value "0"
Coef7Value "0"
HDLInputPortsMappingAltera "dataa(0).1.0.b,dataa(1).1.0.b,dataa(2).1.0.b"
",dataa(3).1.0.b"
HDLOutputPortsMappingAltera "result.11.0.s"
HDLImplicitPortsMappingAltera "clock.VCC, sclr.GND, ena.VCC"
HDLParameterMappingAltera "coef0.\"101101110\".std_logic_vector,coef1.\""
"000011101\".std_logic_vector,coef2.\"010001100\".std_logic_vector,coef3.\"010"
"110001\".std_logic_vector,coef4.\"000000000\".std_logic_vector,coef5.\"000000"
"000\".std_logic_vector,coef6.\"000000000\".std_logic_vector,coef7.\"000000000"
"\".std_logic_vector,lpm_widthcoef.9.positive,pipeline.0.natural,NumberOfInput"
"Bits.4.natural,lpm_widthr.11.positive"
HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbuilde"
"rblock.all;"
HDLComponentNameAltera "sMultiBitAddSub"
}
Block {
BlockType Reference
Name "FirResult"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [1140, 447, 1205, 463]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Output"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Output Port"
bwl "11"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "FirResult"
ppat "G:\\EDA\\Quartue_II\\DSP\\AltrFir32\\DSPBuilder"
"_AltrFir32"
nSgCpl "1"
Port {
PortNumber 1
Name "FirResult"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
}
}
Block {
BlockType From
Name "From"
Position [945, 457, 1000, 473]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "SyncRst"
}
Block {
BlockType From
Name "From1"
Position [1145, 422, 1200, 438]
ShowName off
CloseFcn "tagdialog Close"
GotoTag "InputFilter"
Port {
PortNumber 1
Name "InputFilter"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
}
}
Block {
BlockType Reference
Name "GND"
Ports [0, 1]
Position [230, 217, 250, 233]
ForegroundColor "blue"
ShowName off
SourceBlock "bus_alteradspbuilder/GND"
SourceType "SGND AlteraBlockSet"
ncstsamp "FirSamplingPeriod"
}
Block {
BlockType Goto
Name "Goto"
Position [385, 212, 440, 228]
ShowName off
GotoTag "SyncRst"
TagVisibility "local"
}
Block {
BlockType Goto
Name "Goto1"
Position [335, 107, 390, 123]
ShowName off
GotoTag "InputFilter"
TagVisibility "local"
}
Block {
BlockType Reference
Name "InputData"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [185, 137, 250, 153]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Input"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "8"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "InputData"
ppat "G:\\EDA\\Quartue_II\\DSP\\AltrFir32\\DSPBuilder"
"_AltrFir32"
nSgCpl "1"
}
Block {
BlockType Reference
Name "Parallel To Serial"
Ports [3, 1]
Position [395, 134, 440, 186]
ForegroundColor "blue"
SourceBlock "store_alteradspbuilder/Parallel To Serial"
SourceType "Par2Ser AlteraBlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
direction "LSB First"
}
Block {
BlockType SubSystem
Name "Partial Product \nAdder"
Ports [6, 1]
Position [835, 384, 925, 491]
ForegroundColor "blue"
AncestorBlock "ALTELINK/AltLab/HDL SubSystem"
TreatAsAtomicUnit off
MaskType "SubSystem AlteraBlockSet"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "Partial Product \nAdder"
Location [240, 272, 1216, 815]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "In[10:0]"
Position [95, 83, 125, 97]
ForegroundColor "blue"
}
Block {
BlockType Inport
Name "In1[10:0]"
Position [100, 38, 130, 52]
ForegroundColor "blue"
Port "2"
}
Block {
BlockType Inport
Name "In2[12:0]"
Position [90, 183, 120, 197]
ForegroundColor "blue"
Port "3"
}
Block {
BlockType Inport
Name "In3[12:0]"
Position [95, 243, 125, 257]
ForegroundColor "blue"
Port "4"
}
Block {
BlockType Inport
Name "In4[16:0]"
Position [100, 343, 130, 357]
ForegroundColor "blue"
Port "5"
}
Block {
BlockType Inport
Name "In5[16:0]"
Position [100, 393, 130, 407]
ForegroundColor "blue"
Port "6"
}
Block {
BlockType Reference
Name "AltBus"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [175, 82, 240, 98]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "11"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus"
nSgCpl "0"
}
Block {
BlockType Reference
Name "AltBus1"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [175, 37, 240, 53]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "11"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus1"
nSgCpl "0"
}
Block {
BlockType Reference
Name "AltBus2"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [165, 182, 230, 198]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "13"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus2"
nSgCpl "0"
}
Block {
BlockType Reference
Name "AltBus3"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [170, 242, 235, 258]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "13"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus3"
nSgCpl "0"
}
Block {
BlockType Reference
Name "AltBus4"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [175, 342, 240, 358]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "17"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus4"
nSgCpl "0"
}
Block {
BlockType Reference
Name "AltBus5"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [175, 392, 240, 408]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "17"
bwr "8"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus5"
nSgCpl "0"
}
Block {
BlockType Reference
Name "Parallel \nAdder Subtractor"
Ports [3, 1]
Position [555, 216, 615, 274]
ForegroundColor "blue"
SourceBlock "arithm_alteradspbuilder/Parallel \nAdder Su"
"btractor"
SourceType "Sum AlteraBlockSet"
Inputs "3"
direction "++"
pipeline on
clken off
MaskValue "1"
}
Block {
BlockType Reference
Name "Pipelined Adder"
Ports [2, 1]
Position [285, 50, 400, 90]
ForegroundColor "blue"
SourceBlock "arithm_alteradspbuilder/Pipelined Adder"
SourceType "HDLEntity AlteraBlockSet"
BusType "Signed Integer"
bwl "12"
bwr "0"
pipeline "2"
UseControlInputs off
HDLInputPortsMappingAltera "dataa.12.0.s,datab.12.0.s"
HDLOutputPortsMappingAltera "result.12.0.s"
HDLImplicitPortsMappingAltera "clock.clock,clken.VCC,sclr.sclr, cin."
"GND, add_sub.VCC"
HDLParameterMappingAltera "width.12.positive,pipeline.2.natural"
HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbu"
"ilderblock.all;"
HDLComponentNameAltera "sLpmAddSub"
}
Block {
BlockType Reference
Name "Pipelined Adder1"
Ports [2, 1]
Position [290, 195, 405, 235]
ForegroundColor "blue"
SourceBlock "arithm_alteradspbuilder/Pipelined Adder"
SourceType "HDLEntity AlteraBlockSet"
BusType "Signed Integer"
bwl "14"
bwr "0"
pipeline "2"
UseControlInputs off
HDLInputPortsMappingAltera "dataa.14.0.s,datab.14.0.s"
HDLOutputPortsMappingAltera "result.14.0.s"
HDLImplicitPortsMappingAltera "clock.clock,clken.VCC,sclr.sclr, cin."
"GND, add_sub.VCC"
HDLParameterMappingAltera "width.14.positive,pipeline.2.natural"
HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbu"
"ilderblock.all;"
HDLComponentNameAltera "sLpmAddSub"
}
Block {
BlockType Reference
Name "Pipelined Adder2"
Ports [2, 1]
Position [290, 350, 405, 390]
ForegroundColor "blue"
SourceBlock "arithm_alteradspbuilder/Pipelined Adder"
SourceType "HDLEntity AlteraBlockSet"
BusType "Signed Integer"
bwl "18"
bwr "0"
pipeline "2"
UseControlInputs off
HDLInputPortsMappingAltera "dataa.18.0.s,datab.18.0.s"
HDLOutputPortsMappingAltera "result.18.0.s"
HDLImplicitPortsMappingAltera "clock.clock,clken.VCC,sclr.sclr, cin."
"GND, add_sub.VCC"
HDLParameterMappingAltera "width.18.positive,pipeline.2.natural"
HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbu"
"ilderblock.all;"
HDLComponentNameAltera "sLpmAddSub"
}
Block {
BlockType Reference
Name "res"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [695, 237, 760, 253]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/AltBus"
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