songer.vhd

VHDL实现唱歌的功能

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY Songer IS
	PORT(CLK12MHZ :IN STD_LOGIC;
		 CLK8HZ :IN STD_LOGIC;
		 sel	:in std_logic;		--歌曲选择 1选择 music，0选择 music1
		 CODE1 :OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
		 HIGH1 :OUT STD_LOGIC;
		tone1	:out std_logic_vector(10 downto 0);
		
		 SPKOUT :OUT STD_LOGIC
		 );
END;
ARCHITECTURE one OF Songer IS
	COMPONENT NoteTabs
	PORT(clk :IN STD_LOGIC;
		 sel :in std_logic;
		 ToneIndex :OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
	END COMPONENT;
	COMPONENT ToneTaba
		PORT(Index :IN STD_LOGIC_VECTOR(3 DOWNTO 0);
			 CODE :OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
			 HIGH :OUT STD_LOGIC;
			 Tone :OUT STD_LOGIC_VECTOR(10 DOWNTO 0));
	END COMPONENT;
	COMPONENT Speakera
		PORT(clk :IN STD_LOGIC;
			 Tone :IN STD_LOGIC_VECTOR(10 DOWNTO 0);
			 SpkS :OUT STD_LOGIC);
	END COMPONENT;
	SIGNAL Tone :STD_LOGIC_VECTOR(10 DOWNTO 0);
	SIGNAL ToneIndex :STD_LOGIC_VECTOR(3 DOWNTO 0);
	
BEGIN
tone1<=tone;
u1 :NoteTabs PORT MAP(clk=>CLK8HZ,sel=>sel,ToneIndex=>ToneIndex);
u2 :ToneTaba PORT MAP(Index=>ToneIndex,Tone=>Tone,CODE=>CODE1,HIGH=>HIGH1);
u3 :Speakera PORT MAP(clk=>CLK12MHZ,Tone=>TONE,SpkS=>SPKOUT);
END;