schematics.java

The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that c

/* -*- tab-width: 4 -*-
 *
 * Electric(tm) VLSI Design System
 *
 * File: Schematics.java
 *
 * Copyright (c) 2003 Sun Microsystems and Static Free Software
 *
 * Electric(tm) is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 3 of the License, or
 * (at your option) any later version.
 *
 * Electric(tm) is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with Electric(tm); see the file COPYING.  If not, write to
 * the Free Software Foundation, Inc., 59 Temple Place, Suite 330,
 * Boston, Mass 02111-1307, USA.
 */
package com.sun.electric.technology.technologies;

import com.sun.electric.database.geometry.DBMath;
import com.sun.electric.database.geometry.EGraphics;
import com.sun.electric.database.geometry.ERectangle;
import com.sun.electric.database.geometry.Poly;
import com.sun.electric.database.hierarchy.Cell;
import com.sun.electric.database.hierarchy.Export;
import com.sun.electric.database.hierarchy.Library;
import com.sun.electric.database.hierarchy.Nodable;
import com.sun.electric.database.prototype.NodeProto;
import com.sun.electric.database.prototype.PortCharacteristic;
import com.sun.electric.database.text.Pref;
import com.sun.electric.database.topology.Connection;
import com.sun.electric.database.topology.NodeInst;
import com.sun.electric.database.topology.PortInst;
import com.sun.electric.database.variable.EditWindow0;
import com.sun.electric.database.variable.TextDescriptor;
import com.sun.electric.database.variable.VarContext;
import com.sun.electric.database.variable.Variable;
import com.sun.electric.technology.ArcProto;
import com.sun.electric.technology.EdgeH;
import com.sun.electric.technology.EdgeV;
import com.sun.electric.technology.Foundry;
import com.sun.electric.technology.Layer;
import com.sun.electric.technology.PrimitiveNode;
import com.sun.electric.technology.PrimitiveNodeSize;
import com.sun.electric.technology.PrimitivePort;
import com.sun.electric.technology.SizeOffset;
import com.sun.electric.technology.Technology;
import com.sun.electric.technology.TransistorSize;
import com.sun.electric.tool.user.User;

import java.awt.geom.Point2D;
import java.util.ArrayList;
import java.util.HashMap;
import java.util.Iterator;
import java.util.List;
import java.util.Map;

import javax.swing.JPopupMenu;


/**
 * This is the Schematics technology.
 */
public class Schematics extends Technology
{
	/** key of Variable holding global signal name. */		public static final Variable.Key SCHEM_GLOBAL_NAME = Variable.newKey("SCHEM_global_name");
	/** key of Variable holding resistance. */				public static final Variable.Key SCHEM_RESISTANCE = Variable.newKey("SCHEM_resistance");
	/** key of Variable holding capacitance. */				public static final Variable.Key SCHEM_CAPACITANCE = Variable.newKey("SCHEM_capacitance");
	/** key of Variable holding inductance. */				public static final Variable.Key SCHEM_INDUCTANCE = Variable.newKey("SCHEM_inductance");
	/** key of Variable holding diode area. */				public static final Variable.Key SCHEM_DIODE = Variable.newKey("SCHEM_diode");
	/** key of Variable holding black-box function. */		public static final Variable.Key SCHEM_FUNCTION = Variable.newKey("SCHEM_function");
	/** key of Variable holding transistor width. */		public static final Variable.Key ATTR_WIDTH = Variable.newKey("ATTR_width");
	/** key of Variable holding transistor length. */		public static final Variable.Key ATTR_LENGTH = Variable.newKey("ATTR_length");
	/** key of Variable holding transistor area. */			public static final Variable.Key ATTR_AREA = Variable.newKey("ATTR_area");

	/** the Schematics Technology object. */				public static Schematics tech() { return sysSchematics; }

//	/** Defines the Flip-flop type. */						private static final int FFTYPE =    07;
	/** Defines an RS Flip-flop. */							private static final int FFTYPERS =   0;
	/** Defines a JK Flip-flop. */							private static final int FFTYPEJK =   1;
	/** Defines a D Flip-flop. */							private static final int FFTYPED =    2;
	/** Defines a T Flip-flop. */							private static final int FFTYPET =    3;
//	/** Defines the Flip-flop clocking bits. */				private static final int FFCLOCK =  014;
	/** Defines a Master/Slave Flip-flop. */				private static final int FFCLOCKMS =  0;
	/** Defines a Positive clock Flip-flop. */				private static final int FFCLOCKP =  04;
	/** Defines a Negative clock Flip-flop. */				private static final int FFCLOCKN = 010;

	/** Defines an nMOS transistor. */						private static final int TRANNMOS      =  0;
	/** Defines a nMOS depletion transistor. */				private static final int TRANNMOSD     =  1;
	/** Defines a pMOS transistor. */						private static final int TRANPMOS      =  2;
	/** Defines an NPN Junction transistor. */				private static final int TRANNPN       =  3;
	/** Defines a PNP Junction transistor. */				private static final int TRANPNP       =  4;
	/** Defines an N Junction FET transistor. */			private static final int TRANNJFET     =  5;
	/** Defines a P Junction FET transistor. */				private static final int TRANPJFET     =  6;
	/** Defines a Depletion MESFET transistor. */			private static final int TRANDMES      =  7;
	/** Defines an Enhancement MESFET transistor. */		private static final int TRANEMES      =  8;
	/** Defines a pMOS depletion transistor. */				private static final int TRANPMOSD     =  9;
	/** Defines a nMOS native transistor. */				private static final int TRANNMOSNT    = 10;
	/** Defines a pMOS native transistor. */				private static final int TRANPMOSNT    = 11;
	/** Defines a nMOS floating gate transistor. */			private static final int TRANNMOSFG    = 12;
	/** Defines a pMOS floating gate transistor. */			private static final int TRANPMOSFG    = 13;
	/** Defines a nMOS low threshold transistor. */			private static final int TRANNMOSVTL   = 14;
	/** Defines a pMOS low threshold transistor. */			private static final int TRANPMOSVTL   = 15;
	/** Defines a nMOS high threshold transistor. */		private static final int TRANNMOSVTH   = 16;
	/** Defines a pMOS high threshold transistor. */		private static final int TRANPMOSVTH   = 17;
	/** Defines a nMOS high voltage-1 transistor. */		private static final int TRANNMOSHV1   = 18;
	/** Defines a pMOS high voltage-1 transistor. */		private static final int TRANPMOSHV1   = 19;
	/** Defines a nMOS high voltage-2 transistor. */		private static final int TRANNMOSHV2   = 20;
	/** Defines a pMOS high voltage-2 transistor. */		private static final int TRANPMOSHV2   = 21;
	/** Defines a nMOS high voltage-3 transistor. */		private static final int TRANNMOSHV3   = 22;
	/** Defines a pMOS high voltage-3 transistor. */		private static final int TRANPMOSHV3   = 23;
	/** Defines a nMOS native high voltage-1 transistor. */	private static final int TRANNMOSNTHV1 = 24;
	/** Defines a pMOS native high voltage-1 transistor. */	private static final int TRANPMOSNTHV1 = 25;
	/** Defines a nMOS native high voltage-2 transistor. */	private static final int TRANNMOSNTHV2 = 26;
	/** Defines a pMOS native high voltage-2 transistor. */	private static final int TRANPMOSNTHV2 = 27;
	/** Defines a nMOS native high voltage-3 transistor. */	private static final int TRANNMOSNTHV3 = 28;
	/** Defines a pMOS native high voltage-3 transistor. */	private static final int TRANPMOSNTHV3 = 29;

	/** Defines a normal Diode. */							private static final int DIODENORM =  0;
	/** Defines a Zener Diode. */							private static final int DIODEZENER = 1;

	/** Defines a normal Capacitor. */						private static final int CAPACNORM =  0;
	/** Defines an Electrolytic Capacitor. */				private static final int CAPACELEC =  1;

    /** Defines a normal Resistor. */                   	private static final int RESISTNORM  =  0;
    /** Defines an n-poly Resistor. */                     	private static final int RESISTNPOLY =  1;
    /** Defines a p-poly Resistor. */                     	private static final int RESISTPPOLY =  2;
    /** Defines an n-well Resistor. */                     	private static final int RESISTNWELL =  3;
    /** Defines a p-well Resistor. */                     	private static final int RESISTPWELL =  4;

	/** Defines a Transconductance two-port (VCCS). */		private static final int TWOPVCCS =  0;
	/** Defines a Transresistance two-port (CCVS). */		private static final int TWOPCCVS =  1;
	/** Defines a Voltage gain two-port (VCVS). */			private static final int TWOPVCVS =  2;
	/** Defines a Current gain two-port (CCCS). */			private static final int TWOPCCCS =  3;
	/** Defines a Transmission Line two-port. */			private static final int TWOPTLINE = 4;

	/** the node layer */				public Layer node_lay;

	/** wire arc */						public ArcProto wire_arc;
	/** bus arc */						public ArcProto bus_arc;

	/** wire-pin */						public PrimitiveNode wirePinNode;
	/** bus-pin */						public PrimitiveNode busPinNode;
	/** wire-con */						public PrimitiveNode wireConNode;
	/** buffer */						public PrimitiveNode bufferNode;
	/** and */							public PrimitiveNode andNode;
	/** or */							public PrimitiveNode orNode;
	/** xor */							public PrimitiveNode xorNode;
	/** flipflop */						public PrimitiveNode flipflopNode;
	/** mux */							public PrimitiveNode muxNode;
	/** bbox */							public PrimitiveNode bboxNode;
	/** switch */						public PrimitiveNode switchNode;
	/** offpage */						public PrimitiveNode offpageNode;
	/** power */						public PrimitiveNode powerNode;
	/** ground */						public PrimitiveNode groundNode;
	/** source */						public PrimitiveNode sourceNode;
	/** transistor */					public PrimitiveNode transistorNode;
	/** resistor */						public PrimitiveNode resistorNode;
	/** capacitor */					public PrimitiveNode capacitorNode;
	/** diode */						public PrimitiveNode diodeNode;
	/** inductor */						public PrimitiveNode inductorNode;
	/** meter */						public PrimitiveNode meterNode;
	/** well */							public PrimitiveNode wellNode;
	/** substrate */					public PrimitiveNode substrateNode;
	/** twoport */						public PrimitiveNode twoportNode;
	/** transistor-4 */					public PrimitiveNode transistor4Node;
	/** global */						public PrimitiveNode globalNode;
	/** global partition */				public PrimitiveNode globalPartitionNode;

	private Layer arc_lay, bus_lay, text_lay;
	private Technology.NodeLayer [] ffLayersRSMS, ffLayersRSP, ffLayersRSN;
	private Technology.NodeLayer [] ffLayersJKMS, ffLayersJKP, ffLayersJKN;
	private Technology.NodeLayer [] ffLayersDMS, ffLayersDP, ffLayersDN;
	private Technology.NodeLayer [] ffLayersTMS, ffLayersTP, ffLayersTN;
	private Technology.NodeLayer [] tranLayersN, tranLayersP;
	private Technology.NodeLayer [] tranLayersNd, tranLayersPd;
	private Technology.NodeLayer [] tranLayersNnT, tranLayersPnT;
	private Technology.NodeLayer [] tranLayersNfG, tranLayersPfG;
	private Technology.NodeLayer [] tranLayersNvtL, tranLayersPvtL;
	private Technology.NodeLayer [] tranLayersNvtH, tranLayersPvtH;
	private Technology.NodeLayer [] tranLayersNht1, tranLayersPht1;
	private Technology.NodeLayer [] tranLayersNht2, tranLayersPht2;
	private Technology.NodeLayer [] tranLayersNht3, tranLayersPht3;
	private Technology.NodeLayer [] tranLayersNnTht1, tranLayersPnTht1;
	private Technology.NodeLayer [] tranLayersNnTht2, tranLayersPnTht2;
	private Technology.NodeLayer [] tranLayersNnTht3, tranLayersPnTht3;
	private Technology.NodeLayer [] tranLayersNPN, tranLayersPNP;
	private Technology.NodeLayer [] tranLayersNJFET, tranLayersPJFET;
	private Technology.NodeLayer [] tranLayersDMES, tranLayersEMES;
	private Technology.NodeLayer [] twoLayersDefault, twoLayersVCVS, twoLayersVCCS, twoLayersCCVS, twoLayersCCCS, twoLayersTran;
	private Technology.NodeLayer [] tran4LayersN, tran4LayersP;
	private Technology.NodeLayer [] tran4LayersNd, tran4LayersPd;
	private Technology.NodeLayer [] tran4LayersNnT, tran4LayersPnT;
	private Technology.NodeLayer [] tran4LayersNfG, tran4LayersPfG;
	private Technology.NodeLayer [] tran4LayersNvtL, tran4LayersPvtL;
	private Technology.NodeLayer [] tran4LayersNvtH, tran4LayersPvtH;
	private Technology.NodeLayer [] tran4LayersNht1, tran4LayersPht1;
	private Technology.NodeLayer [] tran4LayersNht2, tran4LayersPht2;
	private Technology.NodeLayer [] tran4LayersNht3, tran4LayersPht3;
	private Technology.NodeLayer [] tran4LayersNnTht1, tran4LayersPnTht1;
	private Technology.NodeLayer [] tran4LayersNnTht2, tran4LayersPnTht2;
	private Technology.NodeLayer [] tran4LayersNnTht3, tran4LayersPnTht3;
	private Technology.NodeLayer [] tran4LayersNPN, tran4LayersPNP;
	private Technology.NodeLayer [] tran4LayersNJFET, tran4LayersPJFET;
	private Technology.NodeLayer [] tran4LayersDMES, tran4LayersEMES;
	private Technology.NodeLayer [] diodeLayersNorm, diodeLayersZener;
	private Technology.NodeLayer [] capacitorLayersNorm, capacitorLayersElectrolytic;
    private Technology.NodeLayer [] resistorLayersNorm, resistorLayersNPoly, resistorLayersPPoly, resistorLayersNWell, resistorLayersPWell;

	// this much from the center to the left edge