pads4u.jelib

The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that c

# header information:
Hpads4u|8.01ax|USER_electrical_units()I70464

# Views:
Vunknown|""
Vdocumentation|doc
Vlayout|lay
Vschematic|sch

# Technology generic
Tgeneric

# Technology mocmos
Tmocmos

# Technology schematic
Tschematic

# Cell ALLPADS{}
CALLPADS;1{}|mocmos|982175214000|985119488000|
IPAD_corner;1{lay}|PAD_corn@0||-2000|1500|||A20;D0
IPAD_dgnd;1{lay}|PAD_dgnd@0||-1000|1000|||A20;D0
IPAD_dvdd;1{lay}|PAD_dvdd@0||0|1000|||A20;D0
IPAD_flwout;1{lay}|PAD_flwo@0||1000|1000|||A20;D0
IPAD_gnd;1{lay}|PAD_gnd@0||2000|1000|||A20;D0
IPAD_halfSpacer;1{lay}|PAD_half@0||-1700|1500|||A20;D0
IPAD_in;1{lay}|PAD_in@0||1000|0|||A20;D0
IPAD_io;1{lay}|PAD_io@0||0|0|||A20;D0
IPAD_out;1{lay}|PAD_out@0||2000|0|||A20;D0
IPAD_raw;1{lay}|PAD_raw@0||-1000|0|||A20;D0
IPAD_spacer;1{lay}|PAD_spac@0||-2000|1000|||A20;D0
IPAD_vdd;1{lay}|PAD_vdd@0||-2000|0|||A20;D0
X

# Cell PAD_corner{lay}
CPAD_corner;1{lay}|mocmos|952555274000|985119487000||DRC_last_good_drc()I982175940|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0|0|0||AV
NMetal-1-Pin|pin@0||0|3|3|3||W
NMetal-1-Pin|pin@1||-3|0|3|3||W
NMetal-3-Pin|pin@2||-247|0|3|3||W
NMetal-3-Pin|pin@3||-87|0|3|3||W
NMetal-3-Pin|pin@4||0|87|3|3||W
NMetal-3-Pin|pin@5||0|247|3|3||W
NMetal-3-Node|plnode@0||-87|81|150|162||
NMetal-3-Node|plnode@1||-6.25|87|12.5|150||
NMetal-3-Node|plnode@2||-247|161|150|322||
NMetal-3-Node|plnode@3||-86|247|172|150||
NMetal-1-P-Well-Con|well@0||-3|3|18|18||
AMetal-1|net@0||4|S0|pin@0||0|3|well@0||-2.5|3
AMetal-1|net@1||4|S900|well@0||-3|2.5|pin@1||-3|0
AMetal-3|net@2||3|ES0|plnode@1||-11|70|plnode@0||-14|70
AMetal-3|net@3||3|ES1800|plnode@2||-173.5|255|plnode@3||-169|255
AMetal-3|net@4||3|S1800|plnode@1||-1.5|87|pin@4||0|87
AMetal-3|net@5||3|S1800|plnode@3||-1.5|247|pin@5||0|247
AMetal-3|net@6||3|S900|plnode@2||-247|2.5|pin@2||-247|0
AMetal-3|net@7||3|S900|plnode@0||-87|1.5|pin@3||-87|0
EdgndL|D5G1;|pin@3||B
EdgndR|D5G1;|pin@4||B
EdvddL|D5G1;|pin@2||B
EdvddR|D5G1;|pin@5||B
EwelltapL|D5G1;|pin@1||B
EwelltapR|D5G1;|pin@0||B
X

# Cell PAD_dgnd{lay}
CPAD_dgnd;1{lay}|mocmos|952555274000|985119488000||DRC_last_good_drc()I982181180|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0|0|0||AV
NMetal-2-Metal-3-Con|contact@0||-0.5|84.5|451|147||
Ipadpart_bondpad;1{lay}|padpart_@0||0|0|||D0G3;
Ipadpart_pwrrails;1{lay}|padpart_@1||0|0|||D0G3;
NMetal-2-Node|plnode@0||-0.25|172.75|450.5|325.5||
AMetal-2|net@0||3|ES0|plnode@0||-53|155.5|contact@0||-54|155.5
AMetal-2|net@1||3|S0|padpart_@0|m1m2|6|334|plnode@0||6|334
AMetal-3|net@2||3|S0|padpart_@1|dgndR|375|87|contact@0||222.5|87
Edgnd|D5G1;|padpart_@0|pin|B
EdgndL|D5G1;|padpart_@1|dgndL|B
EdgndR|D5G1;|padpart_@1|dgndR|B
EdvddL|D5G1;|padpart_@1|dvddL|B
EdvddR|D5G1;|padpart_@1|dvddR|B
EwelltapL|D5G1;|padpart_@1|welltapL|B
EwelltapR|D5G1;|padpart_@1|welltapR|B
X

# Cell PAD_dvdd{lay}
CPAD_dvdd;1{lay}|mocmos|952555274000|985119488000||DRC_last_good_drc()I982178126|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0|0|0||AV
NMetal-2-Metal-3-Con|contact@0||0.5|243.5|451|147||
Ipadpart_bondpad;1{lay}|padpart_@0||0|0|||D0G3;
Ipadpart_pwrrails;1{lay}|padpart_@1||0|0|||D0G3;
NMetal-2-Node|plnode@0||0.25|255.75|451.5|165.5||
AMetal-2|net@0||3|ES0|plnode@0||-53|314.5|contact@0||-53|314.5
AMetal-2|net@1||3|S0|padpart_@0|m2m3|6|337|plnode@0||6|337
AMetal-3|net@2||3|S0|padpart_@1|dvddR|375|247|contact@0||223.5|247
EdgndL|D5G1;|padpart_@1|dgndL|B
EdgndR|D5G1;|padpart_@1|dgndR|B
Edvdd|D5G1;|padpart_@0|pin|B
EdvddL|D5G1;|padpart_@1|dvddL|B
EdvddR|D5G1;|padpart_@1|dvddR|B
EwelltapL|D5G1;|padpart_@1|welltapL|B
EwelltapR|D5G1;|padpart_@1|welltapR|B
X

# Cell PAD_flwout{lay}
CPAD_flwout;1{lay}|mocmos|960926678000|985119488000||DRC_last_good_drc()I982178108|prototype_center()I[0,0]
Ngeneric:Facet-Center|art@0||0|0|0|0||AV
Ipadpart_flwout;1{lay}|padpart_@0||0|0||E|D0G3;
Ipadpart_bondpad;1{lay}|padpart_@1||0|0|||D0G3;
AMetal-2|net@0||100|S900|padpart_@1|m1m2|-3|355.5|padpart_@0|out|-3|266.5
EdgndL|D5G1;|padpart_@0|dgndL|B
EdgndR|D5G1;|padpart_@0|dgndR|B
EdvddL|D5G1;|padpart_@0|dvddL|B
EdvddR|D5G1;|padpart_@0|dvddR|B
Ein|D5G1;|padpart_@0|in|I
Eout|D5G1;|padpart_@1|pin|B
EwelltapL|D5G1;|padpart_@0|welltapL|B
EwelltapR|D5G1;|padpart_@0|welltapR|B
X

# Cell PAD_flwout{sch}
CPAD_flwout;1{sch}|schematic|985119976000|985121351000|
NOff-Page|conn@0||46|27|4|2||
NOff-Page|conn@1||32|27|4|2||
NOff-Page|conn@2||34|-12|4|2||
NOff-Page|conn@3||-32|6|4|2||
N4-Port-Transistor|nmos4p@0||97|-1|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-2;)I150|ATTR_width(D5G1;X0.5;Y-2;)I10
N4-Port-Transistor|nmos4p@1||88|-1|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-2;)I2|ATTR_width(D5G1;X0.5;Y-2;)I20
N4-Port-Transistor|nmos4p@2||81|-1|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-2;)I2|ATTR_width(D5G1;X0.5;Y-2;)I20
N4-Port-Transistor|nmos4p@3||73|13|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@4||66|13|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@5||62|2|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@6||66|-6|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-2;)I2|ATTR_width(D5G1;X0.5;Y-2;)I70
N4-Port-Transistor|nmos4p@7||16|-6|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-2;)I2|ATTR_width(D5G1;X0.5;Y-2;)I70
N4-Port-Transistor|nmos4p@8||20|2|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@9||16|13|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@10||9|13|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@11||-2|-5|4|4|YRRR||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I10
N4-Port-Transistor|nmos4p@12||-10|-5|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@13||-10|2|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|nmos4p@14||-20|-5|4|4|R||ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I20
NWire_Pin|pin@0||42|16|0.5|0.5||
NWire_Pin|pin@1||42|27|0.5|0.5||
NWire_Pin|pin@2||37|23|0.5|0.5||
NWire_Pin|pin@3||37|27|0.5|0.5||
NWire_Pin|pin@4||41|-9|0.5|0.5||
NWire_Pin|pin@5||41|-12|0.5|0.5||
NWire_Pin|pin@6||100|23|0.5|0.5||
NWire_Pin|pin@7||100|-1|0.5|0.5||
NWire_Pin|pin@8||95|23|0.5|0.5||
NWire_Pin|pin@9||95|20|0.5|0.5||
NWire_Pin|pin@10||93|20|0.5|0.5||
NWire_Pin|pin@11||93|19|0.5|0.5||
NWire_Pin|pin@12||97|19|0.5|0.5||
NWire_Pin|pin@13||97|18|0.5|0.5||
NWire_Pin|pin@14||93|18|0.5|0.5||
NWire_Pin|pin@15||93|17|0.5|0.5||
NWire_Pin|pin@16||97|17|0.5|0.5||
NWire_Pin|pin@17||97|16|0.5|0.5||
NWire_Pin|pin@18||93|16|0.5|0.5||
NWire_Pin|pin@19||93|15|0.5|0.5||
NWire_Pin|pin@20||97|15|0.5|0.5||
NWire_Pin|pin@21||97|14|0.5|0.5||
NWire_Pin|pin@22||95|14|0.5|0.5||
NWire_Pin|pin@23||90|5|0.5|0.5||
NWire_Pin|pin@24||95|5|0.5|0.5||
NWire_Pin|pin@25||94|-11|0.5|0.5||
NWire_Pin|pin@26||94|-2|0.5|0.5||
NWire_Pin|pin@27||95|-11|0.5|0.5||
NWire_Pin|pin@28||83|5|0.5|0.5||
NWire_Pin|pin@29||85|12|0.5|0.5||
NWire_Pin|pin@30||85|23|0.5|0.5||
NWire_Pin|pin@31||86|23|0.5|0.5||
NWire_Pin|pin@32||86|-11|0.5|0.5||
NWire_Pin|pin@33||85|-2|0.5|0.5||
NWire_Pin|pin@34||85|-11|0.5|0.5||
NWire_Pin|pin@35||86|5|0.5|0.5||
NWire_Pin|pin@36||90|13|0.5|0.5||
NWire_Pin|pin@37||90|-1|0.5|0.5||
NWire_Pin|pin@38||83|-1|0.5|0.5||
NWire_Pin|pin@39||83|13|0.5|0.5||
NWire_Pin|pin@40||79|5|0.5|0.5||
NWire_Pin|pin@41||73|5|0.5|0.5||
NWire_Pin|pin@42||78|-11|0.5|0.5||
NWire_Pin|pin@43||78|-2|0.5|0.5||
NWire_Pin|pin@44||79|-11|0.5|0.5||
NWire_Pin|pin@45||79|23|0.5|0.5||
NWire_Pin|pin@46||78|23|0.5|0.5||
NWire_Pin|pin@47||78|12|0.5|0.5||
NWire_Pin|pin@48||73|-6|0.5|0.5||
NWire_Pin|pin@49||73|-9|0.5|0.5||
NWire_Pin|pin@50||14|-9|0.5|0.5||
NWire_Pin|pin@51||14|-6|0.5|0.5||
NWire_Pin|pin@52||64|5|0.5|0.5||
NWire_Pin|pin@53||18|5|0.5|0.5||
NWire_Pin|pin@54||51|-2|0.5|0.5||
NWire_Pin|pin@55||56|23|0.5|0.5||
NWire_Pin|pin@56||56|19|0.5|0.5||
NWire_Pin|pin@57||64|23|0.5|0.5|YRR|
NWire_Pin|pin@58||71|16|0.5|0.5|YRR|
NWire_Pin|pin@59||64|16|0.5|0.5|YRR|
NWire_Pin|pin@60||71|10|0.5|0.5|YRR|
NWire_Pin|pin@61||64|10|0.5|0.5|YRR|
NWire_Pin|pin@62||67|7|0.5|0.5|YRR|
NWire_Pin|pin@63||74|7|0.5|0.5|YRR|
NWire_Pin|pin@64||70|12|0.5|0.5|YRR|
NWire_Pin|pin@65||70|-11|0.5|0.5|YRR|
NWire_Pin|pin@66||60|12|0.5|0.5|YRR|
NWire_Pin|pin@67||60|-11|0.5|0.5|YRR|
NWire_Pin|pin@68||64|-11|0.5|0.5|YRR|
NWire_Pin|pin@69||63|-7|0.5|0.5|YRR|
NWire_Pin|pin@70||63|-11|0.5|0.5|YRR|
NWire_Pin|pin@71||70|1|0.5|0.5|YRR|
NWire_Pin|pin@72||56|2|0.5|0.5|YRR|
NWire_Pin|pin@73||64|-2|0.5|0.5|YRR|
NWire_Pin|pin@74||50|23|0.5|0.5||
NWire_Pin|pin@75||50|18|0.5|0.5||
NWire_Pin|pin@76||34|23|0.5|0.5||
NWire_Pin|pin@77||34|18|0.5|0.5||
NWire_Pin|pin@78||51|23|0.5|0.5||
NWire_Pin|pin@79||33|16|0.5|0.5||
NWire_Pin|pin@80||51|16|0.5|0.5||
NWire_Pin|pin@81||18|-2|0.5|0.5||
NWire_Pin|pin@82||33|-2|0.5|0.5||
NWire_Pin|pin@83||26|19|0.5|0.5||
NWire_Pin|pin@84||33|23|0.5|0.5||
NWire_Pin|pin@85||26|23|0.5|0.5||
NWire_Pin|pin@86||26|2|0.5|0.5||
NWire_Pin|pin@87||12|1|0.5|0.5||
NWire_Pin|pin@88||19|-11|0.5|0.5||
NWire_Pin|pin@89||19|-7|0.5|0.5||
NWire_Pin|pin@90||18|-11|0.5|0.5||
NWire_Pin|pin@91||22|-11|0.5|0.5||
NWire_Pin|pin@92||22|12|0.5|0.5||
NWire_Pin|pin@93||12|-11|0.5|0.5||
NWire_Pin|pin@94||12|12|0.5|0.5||
NWire_Pin|pin@95||8|7|0.5|0.5||
NWire_Pin|pin@96||15|7|0.5|0.5||
NWire_Pin|pin@97||18|10|0.5|0.5||
NWire_Pin|pin@98||11|10|0.5|0.5||
NWire_Pin|pin@99||18|16|0.5|0.5||
NWire_Pin|pin@100||11|16|0.5|0.5||
NWire_Pin|pin@101||18|23|0.5|0.5||
NWire_Pin|pin@102||0|16|0.5|0.5||
NWire_Pin|pin@103||4|23|0.5|0.5||
NWire_Pin|pin@104||4|-5|0.5|0.5||
NWire_Pin|pin@105||-8|7|0.5|0.5||
NWire_Pin|pin@106||-4|7|0.5|0.5||
NWire_Pin|pin@107||-6|1|0.5|0.5||
NWire_Pin|pin@108||-6|-11|0.5|0.5||
NWire_Pin|pin@109||-6|-6|0.5|0.5||
NWire_Pin|pin@110||-4|-11|0.5|0.5||
NWire_Pin|pin@111||-8|-11|0.5|0.5||
NWire_Pin|pin@112||-8|-2|0.5|0.5||
NWire_Pin|pin@113||-4|-2|0.5|0.5||
NWire_Pin|pin@114||-14|-5|0.5|0.5||
NWire_Pin|pin@115||-8|5|0.5|0.5||
NWire_Pin|pin@116||-12|5|0.5|0.5||
NWire_Pin|pin@117||-12|2|0.5|0.5||
NWire_Pin|pin@118||-6|15|0.5|0.5||
NWire_Pin|pin@119||-6|18|0.5|0.5||
NWire_Pin|pin@120||-18|6|0.5|0.5||
NWire_Pin|pin@121||-14|6|0.5|0.5||
NWire_Pin|pin@122||-14|16|0.5|0.5||
NWire_Pin|pin@123||-17|-11|0.5|0.5||
NWire_Pin|pin@124||-17|-6|0.5|0.5||
NWire_Pin|pin@125||0|-11|0.5|0.5||
NWire_Pin|pin@126||-18|-11|0.5|0.5||
NWire_Pin|pin@127||-17|23|0.5|0.5||
NWire_Pin|pin@128||-17|15|0.5|0.5||
NWire_Pin|pin@129||-8|23|0.5|0.5||
NWire_Pin|pin@130||-18|23|0.5|0.5||
NWire_Pin|pin@131||-24|6|0.5|0.5||
NWire_Pin|pin@132||-24|-5|0.5|0.5||
NWire_Pin|pin@133||-24|16|0.5|0.5||
N4-Port-Transistor|pmos4p@0||88|13|4|4|YRRR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I20
N4-Port-Transistor|pmos4p@1||81|13|4|4|YRRR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I20
N4-Port-Transistor|pmos4p@2||53|19|4|4|YRRR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|pmos4p@3||31|19|4|4|R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I70
N4-Port-Transistor|pmos4p@4||-2|16|4|4|YRRR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I10
N4-Port-Transistor|pmos4p@5||-10|16|4|4|R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I100
N4-Port-Transistor|pmos4p@6||-20|16|4|4|R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)I2|ATTR_width(D5G1;X0.5;Y-1;)I60
Awire|net@0||0|2700|pin@0||42|16|pin@1||42|27
Awire|net@1||0|1800|pin@79||33|16|pin@0||42|16
Awire|net@2||0|1800|pin@0||42|16|pin@80||51|16
Awire|net@3||0|1800|pin@1||42|27|conn@0|a|44|27
Awire|net@4||0|2700|pin@2||37|23|pin@3||37|27