tt.v

来自「这是一款用VHDL语言编写的对外部DA芯片的控制程序」· Verilog 代码 · 共 48 行

module test_tlc5615;

reg tb_clk, rst,tb_ncs;
reg [9:0] tb_data;
wire sin;
wire ack;

wire sncs,sclk;
wire [9:0]regd;

initial // Clock generator
  begin
    tb_clk = 0;
    forever #10 tb_clk = !tb_clk;
  end
  
initial	// Test stimulus
  begin
    rst = 0;
    #5 rst = 1;
    #4 rst = 0;
    #90000 $stop;
  end
  
initial	// Test stimulus
  begin
    tb_ncs = 1;
    #25 tb_ncs = 0;
    #20 tb_ncs = 1;
    #20 tb_ncs = 0;
    #20 tb_ncs = 1;
    #1500 tb_ncs = 0;
    #20 tb_ncs = 1;
    #90000 $stop;
  end

initial	// Test stimulus
  begin
    tb_data = 10'b0000000000;
    #20 tb_data = 10'b0000000001;
    #20 tb_data = 10'b0000000010;
    #1000 tb_data = 10'b1111000011;
    #90000 $stop;
  end
tlc5615	 TLC5615(tb_clk,rst,tb_data,tb_ncs,ack,sin,sclk,sncs,regd);	
//wave_rom ROM1610(tb_clk,tb_data,data) ;    
    
endmodule