tlc5615.map.rpt

这是一款用VHDL语言编写的对外部DA芯片的控制程序

+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in F:/altera/Dac/tlc5615/Tlc5615.map.eqn.


+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                   ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path                                        ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; Tlc5615.v                        ; yes             ; F:/altera/Dac/tlc5615/Tlc5615.v                                     ;
; lpm_counter.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf         ;
; lpm_constant.inc                 ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_constant.inc        ;
; lpm_decode.inc                   ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; c:/altera/quartus42/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal42.inc                    ; yes             ; c:/altera/quartus42/libraries/megafunctions/aglobal42.inc           ;
; alt_counter_f10ke.tdf            ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf   ;
; flex10ke_lcell.inc               ; yes             ; c:/altera/quartus42/libraries/megafunctions/flex10ke_lcell.inc      ;
; lpm_add_sub.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf         ;
; addcore.inc                      ; yes             ; c:/altera/quartus42/libraries/megafunctions/addcore.inc             ;
; look_add.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/look_add.inc            ;
; bypassff.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/bypassff.inc            ;
; altshift.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/altshift.inc            ;
; alt_stratix_add_sub.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_stratix_add_sub.inc ;
; alt_mercury_add_sub.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_mercury_add_sub.inc ;
; addcore.tdf                      ; yes             ; c:/altera/quartus42/libraries/megafunctions/addcore.tdf             ;
; a_csnbuffer.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.inc         ;
; a_csnbuffer.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf         ;
; altshift.tdf                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/altshift.tdf            ;
+----------------------------------+-----------------+---------------------------------------------------------------------+


+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+-----------------------------------+---------+
; Resource                          ; Usage   ;
+-----------------------------------+---------+
; Logic cells                       ; 136     ;
; Total combinational functions     ; 114     ;
; Total 4-input functions           ; 46      ;
; Total 3-input functions           ; 32      ;
; Total 2-input functions           ; 21      ;
; Total 1-input functions           ; 15      ;
; Total 0-input functions           ; 0       ;
; Combinational cells for routing   ; 0       ;
; Total registers                   ; 66      ;
; Total logic cells in carry chains ; 23      ;
; I/O pins                          ; 5       ;
; Maximum fan-out node              ; clk     ;
; Maximum fan-out                   ; 66      ;
; Total fan-out                     ; 532     ;
; Average fan-out                   ; 3.77    ;
+-----------------------------------+---------+


+----------------------------------------------------------------+
; WYSIWYG Cells                                                  ;
+--------------------------------------------------------+-------+
; Statistic                                              ; Value ;
+--------------------------------------------------------+-------+
; Number of WYSIWYG cells                                ; 6     ;
; Number of synthesis-generated cells                    ; 130   ;
; Number of WYSIWYG LUTs                                 ; 6     ;
; Number of synthesis-generated LUTs                     ; 108   ;
; Number of WYSIWYG registers                            ; 6     ;
; Number of synthesis-generated registers                ; 60    ;
; Number of cells with combinational logic only          ; 70    ;
; Number of cells with registers only                    ; 22    ;
; Number of cells with combinational logic and registers ; 44    ;
+--------------------------------------------------------+-------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 66    ;
; Number of registers using Synchronous Clear  ; 6     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 56    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 35    ;
; Number of registers using Output Enable      ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------+
; Inverted Register Statistics                     ;
+----------------------------------------+---------+
; Inverted Register                      ; Fan out ;
+----------------------------------------+---------+
; tlc5615_1:TLC|SIN                      ; 2       ;
; tlc5615_1:TLC|SCL                      ; 7       ;
; tlc5615_1:TLC|SNCS                     ; 12      ;
; tlc5615_1:TLC|ncs_d                    ; 2       ;
; ctrl:HH|ncs                            ; 4       ;
; Total number of inverted registers = 5 ;         ;
+----------------------------------------+---------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Wed Jul 19 16:15:10 2006
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off Tlc5615 -c Tlc5615
Info: Found 4 design units, including 4 entities, in source file Tlc5615.v
    Info: Found entity 1: Tlc5615
    Info: Found entity 2: ctrl
    Info: Found entity 3: tlc5615_1
    Info: Found entity 4: sin_rom
Info: Inferred 1 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=6) from the following logic: "ctrl:HH|mem_addr[0]~18"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.tdf
    Info: Found entity 1: alt_counter_f10ke
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Registers with preset signals will power-up high
Info: Implemented 141 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 3 output pins
    Info: Implemented 136 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Processing ended: Wed Jul 19 16:15:15 2006
    Info: Elapsed time: 00:00:05