tlc5615.map.summary

这是一款用VHDL语言编写的对外部DA芯片的控制程序

Flow Status : Successful - Wed Jul 19 16:15:15 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : Tlc5615
Top-level Entity Name : Tlc5615
Family : ACEX1K
Device : EP1K100QC208-3
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 136
Total pins : 5
Total memory bits : 0
Total PLLs : 0