tlc5615.map.eqn

这是一款用VHDL语言编写的对外部DA芯片的控制程序

--D1_SIN is tlc5615_1:TLC|SIN
--operation mode is normal

D1_SIN_lut_out = D1_SNCS & D1L21 & !D1L5 # !D1L21 & D1_SIN;
D1_SIN = DFFEA(D1_SIN_lut_out, clk, !rst, , , , );


--D1_SCL is tlc5615_1:TLC|SCL
--operation mode is normal

D1_SCL_lut_out = D1_SNCS & D1_clk250 & D1_SCL & D1_clk250_d # !D1_clk250 & D1_SCL # D1_clk250_d;
D1_SCL = DFFEA(D1_SCL_lut_out, clk, !rst, , , , );


--D1_SNCS is tlc5615_1:TLC|SNCS
--operation mode is normal

D1_SNCS_lut_out = D1_SNCS & D1L7 # !D1_SNCS & D1_ncs_d & !B1_ncs;
D1_SNCS = DFFEA(D1_SNCS_lut_out, clk, !rst, , , , );


--D1_reg_data[9] is tlc5615_1:TLC|reg_data[9]
--operation mode is normal

D1_reg_data[9]_lut_out = D1L11 & B1_wr_data[9] # !D1L11 & D1L93;
D1_reg_data[9] = DFFEA(D1_reg_data[9]_lut_out, clk, !rst, , , , );


--D1_scounter[3] is tlc5615_1:TLC|scounter[3]
--operation mode is normal

D1_scounter[3]_lut_out = D1L9 & D1_SNCS;
D1_scounter[3] = DFFEA(D1_scounter[3]_lut_out, clk, !rst, , A1L7, , );


--D1_scounter[2] is tlc5615_1:TLC|scounter[2]
--operation mode is normal

D1_scounter[2]_lut_out = D1_SNCS & D1_scounter[2] $ D1L8;
D1_scounter[2] = DFFEA(D1_scounter[2]_lut_out, clk, !rst, , A1L7, , );


--D1_scounter[1] is tlc5615_1:TLC|scounter[1]
--operation mode is normal

D1_scounter[1]_lut_out = A1L8;
D1_scounter[1] = DFFEA(D1_scounter[1]_lut_out, clk, !rst, , A1L01, , );


--D1L5 is tlc5615_1:TLC|SIN~184
--operation mode is normal

D1L5 = D1_reg_data[9] # D1_scounter[3] & D1_scounter[2] # D1_scounter[1];


--D1_scl_d is tlc5615_1:TLC|scl_d
--operation mode is normal

D1_scl_d_lut_out = !D1_SCL;
D1_scl_d = DFFEA(D1_scl_d_lut_out, clk, !rst, , , , );


--D1L21 is tlc5615_1:TLC|always9~53
--operation mode is normal

D1L21 = D1_SCL & D1_scl_d;


--D1_clk250 is tlc5615_1:TLC|clk250
--operation mode is normal

D1_clk250_lut_out = !D1_clk250;
D1_clk250 = DFFEA(D1_clk250_lut_out, clk, !rst, , D1L62, , );


--D1_clk250_d is tlc5615_1:TLC|clk250_d
--operation mode is normal

D1_clk250_d_lut_out = D1_clk250;
D1_clk250_d = DFFEA(D1_clk250_d_lut_out, clk, !rst, , , , );


--D1_scounter[0] is tlc5615_1:TLC|scounter[0]
--operation mode is normal

D1_scounter[0]_lut_out = D1L21 & D1_SNCS & !D1_scounter[0];
D1_scounter[0] = DFFEA(D1_scounter[0]_lut_out, clk, !rst, , A1L01, , );


--D1L7 is tlc5615_1:TLC|SNCS~115
--operation mode is normal

D1L7 = D1_scounter[1] # !D1_scounter[0] # !D1_scounter[2] # !D1_scounter[3];


--D1_ncs_d is tlc5615_1:TLC|ncs_d
--operation mode is normal

D1_ncs_d_lut_out = B1_ncs;
D1_ncs_d = DFFEA(D1_ncs_d_lut_out, clk, !rst, , , , );


--B1_ncs is ctrl:HH|ncs
--operation mode is normal

B1_ncs_lut_out = B1_ncs & B1L41 # B1_cter[2] & B1L81 # !B1_ncs & B1_cter[2] & B1L81;
B1_ncs = DFFEA(B1_ncs_lut_out, clk, !rst, , , , );


--B1_wr_data[9] is ctrl:HH|wr_data[9]
--operation mode is normal

B1_wr_data[9]_lut_out = C1_data[9];
B1_wr_data[9] = DFFEA(B1_wr_data[9]_lut_out, clk, !rst, , B1L02, , );


--D1_reg_data[8] is tlc5615_1:TLC|reg_data[8]
--operation mode is normal

D1_reg_data[8]_lut_out = D1L11 & B1_wr_data[8] # !D1L11 & D1L04;
D1_reg_data[8] = DFFEA(D1_reg_data[8]_lut_out, clk, !rst, , , , );


--D1L01 is tlc5615_1:TLC|always6~47
--operation mode is normal

D1L01 = D1_SNCS & !D1_SCL & !D1_scl_d;


--D1L93 is tlc5615_1:TLC|reg_data~1899
--operation mode is normal

D1L93 = D1L01 & D1_reg_data[8] # !D1L01 & D1_reg_data[9];


--D1L11 is tlc5615_1:TLC|always6~48
--operation mode is normal

D1L11 = B1_ncs & !D1_SNCS & !D1_ncs_d;


--D1_cter[0] is tlc5615_1:TLC|cter[0]
--operation mode is arithmetic

D1_cter[0]_lut_out = D1L2 & !D1_cter[0];
D1_cter[0] = DFFEA(D1_cter[0]_lut_out, clk, !rst, , D1L2, , );

--J6_cout[0] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

J6_cout[0] = CARRY(D1_cter[0]);


--D1_cter[4] is tlc5615_1:TLC|cter[4]
--operation mode is normal

D1_cter[4]_lut_out = D1L1 & J6_cs_buffer[4];
D1_cter[4] = DFFEA(D1_cter[4]_lut_out, clk, !rst, , D1L2, , );


--D1_cter[3] is tlc5615_1:TLC|cter[3]
--operation mode is normal

D1_cter[3]_lut_out = J6_cs_buffer[3] & D1L1;
D1_cter[3] = DFFEA(D1_cter[3]_lut_out, clk, !rst, , D1L2, , );


--D1_cter[2] is tlc5615_1:TLC|cter[2]
--operation mode is normal

D1_cter[2]_lut_out = J6_cs_buffer[2] & D1L1;
D1_cter[2] = DFFEA(D1_cter[2]_lut_out, clk, !rst, , D1L2, , );


--D1_cter[1] is tlc5615_1:TLC|cter[1]
--operation mode is normal

D1_cter[1]_lut_out = J6_cs_buffer[1] & D1L1;
D1_cter[1] = DFFEA(D1_cter[1]_lut_out, clk, !rst, , D1L2, , );


--D1L72 is tlc5615_1:TLC|reduce_nor~36
--operation mode is normal

D1L72 = D1_cter[4] & D1_cter[3] & D1_cter[2] & D1_cter[1];


--D1_cter[7] is tlc5615_1:TLC|cter[7]
--operation mode is normal

D1_cter[7]_lut_out = J6_cs_buffer[7];
D1_cter[7] = DFFEA(D1_cter[7]_lut_out, clk, !rst, , D1L1, , );


--D1_cter[6] is tlc5615_1:TLC|cter[6]
--operation mode is normal

D1_cter[6]_lut_out = J6_cs_buffer[6];
D1_cter[6] = DFFEA(D1_cter[6]_lut_out, clk, !rst, , D1L1, , );


--D1_cter[5] is tlc5615_1:TLC|cter[5]
--operation mode is normal

D1_cter[5]_lut_out = J6_cs_buffer[5];
D1_cter[5] = DFFEA(D1_cter[5]_lut_out, clk, !rst, , D1L1, , );


--D1_cter[8] is tlc5615_1:TLC|cter[8]
--operation mode is normal

D1_cter[8]_lut_out = G2_unreg_res_node[8];
D1_cter[8] = DFFEA(D1_cter[8]_lut_out, clk, !rst, , D1L1, , );


--D1L2 is tlc5615_1:TLC|LessThan~137
--operation mode is normal

D1L2 = !D1_cter[7] & !D1_cter[6] & !D1_cter[5] & !D1_cter[8];


--D1L62 is tlc5615_1:TLC|reduce_nor~0
--operation mode is normal

D1L62 = D1_cter[0] & D1L72 & D1L2;


--B1_cter[2] is ctrl:HH|cter[2]
--operation mode is normal

B1_cter[2]_lut_out = J3_cs_buffer[2];
B1_cter[2] = DFFEA(B1_cter[2]_lut_out, clk, !rst, , B1L1, , );


--B1_cter[1] is ctrl:HH|cter[1]
--operation mode is normal

B1_cter[1]_lut_out = J3_cs_buffer[1];
B1_cter[1] = DFFEA(B1_cter[1]_lut_out, clk, !rst, , B1L1, , );


--B1_cter[3] is ctrl:HH|cter[3]
--operation mode is normal

B1_cter[3]_lut_out = B1L1 & J3_cs_buffer[3];
B1_cter[3] = DFFEA(B1_cter[3]_lut_out, clk, !rst, , A1L6, , );


--B1_cter[8] is ctrl:HH|cter[8]
--operation mode is normal

B1_cter[8]_lut_out = B1L1 & G1_unreg_res_node[8] # !A1L6;
B1_cter[8] = DFFEA(B1_cter[8]_lut_out, clk, !rst, , , , );


--B1_cter[7] is ctrl:HH|cter[7]
--operation mode is normal

B1_cter[7]_lut_out = B1L1 & J3_cs_buffer[7] # !A1L6;
B1_cter[7] = DFFEA(B1_cter[7]_lut_out, clk, !rst, , , , );


--B1_cter[6] is ctrl:HH|cter[6]
--operation mode is normal

B1_cter[6]_lut_out = B1L1 & J3_cs_buffer[6] # !A1L6;
B1_cter[6] = DFFEA(B1_cter[6]_lut_out, clk, !rst, , , , );


--B1_cter[5] is ctrl:HH|cter[5]
--operation mode is normal

B1_cter[5]_lut_out = B1L1 & J3_cs_buffer[5] # !A1L6;
B1_cter[5] = DFFEA(B1_cter[5]_lut_out, clk, !rst, , , , );


--B1_cter[4] is ctrl:HH|cter[4]
--operation mode is normal

B1_cter[4]_lut_out = J3_cs_buffer[4] & B1L1;
B1_cter[4] = DFFEA(B1_cter[4]_lut_out, clk, !rst, , A1L6, , );


--B1L61 is ctrl:HH|reduce_nor~112
--operation mode is normal

B1L61 = B1_cter[7] & B1_cter[6] & B1_cter[5] & B1_cter[4];


--B1L2 is ctrl:HH|LessThan~78
--operation mode is normal

B1L2 = B1_cter[3] & B1_cter[8] & B1L61;


--B1L41 is ctrl:HH|reduce_nor~1
--operation mode is normal

B1L41 = B1_cter[2] # B1_cter[1] # !B1_cter[0] # !B1L2;


--B1L71 is ctrl:HH|reduce_nor~113
--operation mode is normal

B1L71 = B1_cter[0] & !B1_cter[3];


--B1L81 is ctrl:HH|reduce_nor~114
--operation mode is normal

B1L81 = B1_cter[8] & B1L61 & B1_cter[1] & B1L71;


--C1_data[9] is sin_rom:HJ|data[9]
--operation mode is normal

C1_data[9]_lut_out = !K1_q[5];
C1_data[9] = DFFEA(C1_data[9]_lut_out, clk, , , , , );


--B1L91 is ctrl:HH|reduce_nor~115
--operation mode is normal

B1L91 = B1_cter[8] # B1_cter[3] # !B1_cter[0] # !B1_cter[2];


--B1L02 is ctrl:HH|reduce_nor~116
--operation mode is normal

B1L02 = !B1_cter[1] & !B1L91 & B1L61;


--B1_wr_data[8] is ctrl:HH|wr_data[8]
--operation mode is normal

B1_wr_data[8]_lut_out = C1_data[8];
B1_wr_data[8] = DFFEA(B1_wr_data[8]_lut_out, clk, !rst, , B1L02, , );


--D1_reg_data[7] is tlc5615_1:TLC|reg_data[7]
--operation mode is normal

D1_reg_data[7]_lut_out = D1L11 & B1_wr_data[7] # !D1L11 & D1L14;
D1_reg_data[7] = DFFEA(D1_reg_data[7]_lut_out, clk, !rst, , , , );


--D1L04 is tlc5615_1:TLC|reg_data~1901
--operation mode is normal

D1L04 = D1L01 & D1_reg_data[7] # !D1L01 & D1_reg_data[8];


--D1L9 is tlc5615_1:TLC|add~18
--operation mode is normal

D1L9 = D1_scounter[3] $ (D1_scounter[2] & D1_scounter[1] & D1_scounter[0]);


--A1L7 is rtl~7
--operation mode is normal

A1L7 = D1_SCL & D1_scl_d # !D1_SNCS;


--D1L8 is tlc5615_1:TLC|add~10
--operation mode is normal

D1L8 = D1_scounter[1] & D1_scounter[0];


--A1L8 is rtl~430
--operation mode is normal

A1L8 = D1_SNCS & D1_scounter[1] $ D1_scounter[0] # !D1L21;


--A1L9 is rtl~431
--operation mode is normal

A1L9 = D1_scounter[3] & D1_scounter[2] & D1_scounter[1] # D1_scounter[0];


--A1L01 is rtl~432
--operation mode is normal

A1L01 = A1L9 # D1_SCL & D1_scl_d # !D1_SNCS;


--J6_cs_buffer[4] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

J6_cs_buffer[4] = D1_cter[4] $ (J6_cout[3]);

--J6_cout[4] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

J6_cout[4] = CARRY(D1_cter[4] & J6_cout[3]);


--J6_cs_buffer[3] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

J6_cs_buffer[3] = D1_cter[3] $ (J6_cout[2]);

--J6_cout[3] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

J6_cout[3] = CARRY(D1_cter[3] & J6_cout[2]);


--J6_cs_buffer[2] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

J6_cs_buffer[2] = D1_cter[2] $ (J6_cout[1]);

--J6_cout[2] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

J6_cout[2] = CARRY(D1_cter[2] & J6_cout[1]);


--J6_cs_buffer[1] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

J6_cs_buffer[1] = D1_cter[1] $ (J6_cout[0]);

--J6_cout[1] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

J6_cout[1] = CARRY(D1_cter[1] & J6_cout[0]);


--J6_cs_buffer[7] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

J6_cs_buffer[7] = D1_cter[7] $ (J6_cout[6]);

--J6_cout[7] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

J6_cout[7] = CARRY(D1_cter[7] & J6_cout[6]);


--D1L1 is tlc5615_1:TLC|LessThan~87
--operation mode is normal

D1L1 = D1L2 & !D1L72 # !D1_cter[0];


--J6_cs_buffer[6] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

J6_cs_buffer[6] = D1_cter[6] $ (J6_cout[5]);

--J6_cout[6] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

J6_cout[6] = CARRY(D1_cter[6] & J6_cout[5]);


--J6_cs_buffer[5] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

J6_cs_buffer[5] = D1_cter[5] $ (J6_cout[4]);

--J6_cout[5] is tlc5615_1:TLC|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

J6_cout[5] = CARRY(D1_cter[5] & J6_cout[4]);


--J3_cs_buffer[2] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

J3_cs_buffer[2] = B1_cter[2] $ (J3_cout[1]);

--J3_cout[2] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

J3_cout[2] = CARRY(B1_cter[2] & J3_cout[1]);


--B1L1 is ctrl:HH|LessThan~35
--operation mode is normal

B1L1 = !B1_cter[0] & !B1_cter[2] & !B1_cter[1] # !B1L2;


--J3_cs_buffer[1] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

J3_cs_buffer[1] = B1_cter[1] $ B1_cter[0];

--J3_cout[1] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

J3_cout[1] = CARRY(B1_cter[1] & B1_cter[0]);


--J3_cs_buffer[3] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

J3_cs_buffer[3] = B1_cter[3] $ (J3_cout[2]);

--J3_cout[3] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic