📄 timer_dsp.vhd
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--*************************************************************
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--**************************************************************
ENTITY Timer_Dsp is
PORT(
CP : IN STD_LOGIC; -- CLOCK
SEGOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- SEG7 Display O/P
SELOUT : OUT STD_LOGIC_VECTOR(5 DOWNTO 0); -- Select SEG7 O/P
NUMOUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); -- Number Display Signal
CLEAR : IN STD_LOGIC
);
END Timer_Dsp;
--**************************************************************
ARCHITECTURE a OF Timer_Dsp IS
COMPONENT COUNTER60
PORT(
CP : IN STD_LOGIC;
BIN : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
S : IN STD_LOGIC;
CLR : IN STD_LOGIC;
EC : IN STD_LOGIC;
CY60 : OUT STD_LOGIC
);
END COMPONENT;
COMPONENT COUNTER24
PORT(
CP : IN STD_LOGIC;
BIN : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
S : IN STD_LOGIC;
CLR : IN STD_LOGIC;
EC : IN STD_LOGIC;
CY24 : OUT STD_LOGIC
);
END COMPONENT;
SIGNAL BIN : STD_LOGIC_VECTOR (5 DOWNTO 0); --Binary O/P
SIGNAL DBS : STD_LOGIC_VECTOR (5 DOWNTO 0); --Binary Sec O/P
SIGNAL DBM : STD_LOGIC_VECTOR (5 DOWNTO 0); --Binary Min O/P
SIGNAL DBH : STD_LOGIC_VECTOR (5 DOWNTO 0); --Binary Hr O/P
SIGNAL ENB : STD_LOGIC_VECTOR (2 DOWNTO 0); --Enable Hr & Min & Sec O/P
SIGNAL SEC : STD_LOGIC; --1 Hz 脉冲
SIGNAL BCD : STD_LOGIC_VECTOR (7 DOWNTO 0);
SIGNAL CLR : STD_LOGIC; --清除信号
SIGNAL CYS,CYM,CYH : STD_LOGIC; --Sec、Min、Hr进位信号
Signal S : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL NUM : STD_LOGIC_VECTOR( 3 DOWNTO 0); -- Number Display Signal
SIGNAL SEG : STD_LOGIC_VECTOR( 6 DOWNTO 0); -- SEG7 Display Signal
SIGNAL SEL : STD_LOGIC_VECTOR( 5 DOWNTO 0); -- Select SEG7 Signal
BEGIN
Connection : Block
Begin
U1: COUNTER60 PORT MAP(CP,DBS,ENB(0),CLR,SEC,CYS); --计秒
U2: COUNTER60 PORT MAP(CP,DBM,ENB(1),CLR,CYS,CYM); --计分
U3: COUNTER24 PORT MAP(CP,DBH,ENB(2),CLR,CYM,CYH); --计时 \
CLR <= CLEAR;
SELOUT <= SEL; -- Seg7 Disp Selection
SEGOUT(6 DOWNTO 0) <= SEG; -- Seven Segment Display
SEGOUT(7) <= '0';
NUMOUT <= NUM;
End Block Connection;
Free_Counter : Block -- 计数器 & 产生扫描信号
Signal Q : STD_LOGIC_VECTOR(24 DOWNTO 0);
Signal DLY : STD_LOGIC;
Begin
PROCESS (CP) -- 计数器计数
Begin
IF CP'Event AND CP='1' then
DLY <= Q(21);
Q <= Q+1;
END IF;
END PROCESS;
SEC <= Q(21) AND NOT DLY; --微分 产生1Hz
S <= Q(15 DOWNTO 13); --about 250 Hz
--扫描信号
SEL <= "111110" WHEN S=0 ELSE
"111101" WHEN S=1 ELSE
"111011" WHEN S=2 ELSE
"110111" WHEN S=3 ELSE
"101111" WHEN S=4 ELSE
"011111" WHEN S=5 ELSE
"111111";
ENB <= "001" WHEN (S=0 OR S=1) ELSE
"010" WHEN (S=2 OR S=3) ELSE
"100" WHEN (S=4 OR S=5) ELSE
"000";
BIN <= DBS WHEN ENB = "001" ELSE
DBM WHEN ENB = "010" ELSE
DBH WHEN ENB = "100" ELSE
"000000";
End Block Free_Counter;
Binary_BCD : Block
BEGIN
BCD <= "00000000" WHEN BIN = 0 ELSE
"00000001" WHEN BIN = 1 ELSE
"00000010" WHEN BIN = 2 ELSE
"00000011" WHEN BIN = 3 ELSE
"00000100" WHEN BIN = 4 ELSE
"00000101" WHEN BIN = 5 ELSE
"00000110" WHEN BIN = 6 ELSE
"00000111" WHEN BIN = 7 ELSE
"00001000" WHEN BIN = 8 ELSE
"00001001" WHEN BIN = 9 ELSE
"00010000" WHEN BIN = 10 ELSE
"00010001" WHEN BIN = 11 ELSE
"00010010" WHEN BIN = 12 ELSE
"00010011" WHEN BIN = 13 ELSE
"00010100" WHEN BIN = 14 ELSE
"00010101" WHEN BIN = 15 ELSE
"00010110" WHEN BIN = 16 ELSE
"00010111" WHEN BIN = 17 ELSE
"00011000" WHEN BIN = 18 ELSE
"00011001" WHEN BIN = 19 ELSE
"00100000" WHEN BIN = 20 ELSE
"00100001" WHEN BIN = 21 ELSE
"00100010" WHEN BIN = 22 ELSE
"00100011" WHEN BIN = 23 ELSE
"00100100" WHEN BIN = 24 ELSE
"00100101" WHEN BIN = 25 ELSE
"00100110" WHEN BIN = 26 ELSE
"00100111" WHEN BIN = 27 ELSE
"00101000" WHEN BIN = 28 ELSE
"00101001" WHEN BIN = 29 ELSE
"00110000" WHEN BIN = 30 ELSE
"00110001" WHEN BIN = 31 ELSE
"00110010" WHEN BIN = 32 ELSE
"00110011" WHEN BIN = 33 ELSE
"00110100" WHEN BIN = 34 ELSE
"00110101" WHEN BIN = 35 ELSE
"00110110" WHEN BIN = 36 ELSE
"00110111" WHEN BIN = 37 ELSE
"00111000" WHEN BIN = 38 ELSE
"00111001" WHEN BIN = 39 ELSE
"01000000" WHEN BIN = 40 ELSE
"01000001" WHEN BIN = 41 ELSE
"01000010" WHEN BIN = 42 ELSE
"01000011" WHEN BIN = 43 ELSE
"01000100" WHEN BIN = 44 ELSE
"01000101" WHEN BIN = 45 ELSE
"01000110" WHEN BIN = 46 ELSE
"01000111" WHEN BIN = 47 ELSE
"01001000" WHEN BIN = 48 ELSE
"01001001" WHEN BIN = 49 ELSE
"01010000" WHEN BIN = 50 ELSE
"01010001" WHEN BIN = 51 ELSE
"01010010" WHEN BIN = 52 ELSE
"01010011" WHEN BIN = 53 ELSE
"01010100" WHEN BIN = 54 ELSE
"01010101" WHEN BIN = 55 ELSE
"01010110" WHEN BIN = 56 ELSE
"01010111" WHEN BIN = 57 ELSE
"01011000" WHEN BIN = 58 ELSE
"01011001" WHEN BIN = 59 ELSE
"00000000";
END Block Binary_BCD;
SELECT_BCD : Block
BEGIN
NUM <= BCD(3 DOWNTO 0) WHEN (S=0 OR S=2 OR S=4) ELSE
BCD(7 DOWNTO 4);
End Block SELECT_BCD;
SEVEN_SEGMENT : Block -- Binary Code -> Segment 7 Code
Begin
--gfedcba
SEG <= "0111111" WHEN NUM = 0 ELSE
"0000110" WHEN NUM = 1 ELSE
"1011011" WHEN NUM = 2 ELSE
"1001111" WHEN NUM = 3 ELSE
"1100110" WHEN NUM = 4 ELSE
"1101101" WHEN NUM = 5 ELSE
"1111101" WHEN NUM = 6 ELSE
"0000111" WHEN NUM = 7 ELSE
"1111111" WHEN NUM = 8 ELSE
"1101111" WHEN NUM = 9 ELSE
"1110111" WHEN NUM = 10 ELSE
"1111100" WHEN NUM = 11 ELSE
"0111001" WHEN NUM = 12 ELSE
"1011110" WHEN NUM = 13 ELSE
"1111001" WHEN NUM = 14 ELSE
"1110001" WHEN NUM = 15 ELSE
"0000000";
End Block SEVEN_SEGMENT;
END a;
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