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Project Information                          c:\vhdl\disk\ch8\keyboard_dec.rpt

MAX+plus II Compiler Report File
Version 9.23 3/19/99
Compiled: 06/23/2000 16:13:39

Copyright (C) 1988-1999 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful


KEYBOARD_DEC


** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

keyboard_dec
      EPM7032LC44-6        7        13       0      13      0           40 %

User Pins:                 7        13       0  



Project Information                          c:\vhdl\disk\ch8\keyboard_dec.rpt

** AUTO GLOBAL SIGNALS **



INFO: Signal 'clk' chosen for auto global Clock


Device-Specific Information:                 c:\vhdl\disk\ch8\keyboard_dec.rpt
keyboard_dec

***** Logic for device 'keyboard_dec' compiled without errors.




Device: EPM7032LC44-6

Device Options:
    Turbo Bit                                    = ON
    Security Bit                                 = OFF

                                          o  o  
                                          u  u  
               k  k  k                    t  t  
               e  e  e                    _  _  
               y  y  y                    f  f  
               _  _  _                    u  u  
               i  i  i  V  G  G  G  c  G  n  n  
               n  n  n  C  N  N  N  l  N  c  c  
               1  2  3  C  D  D  D  k  D  5  6  
             -----------------------------------_ 
           /   6  5  4  3  2  1 44 43 42 41 40   | 
  key_in0 |  7                                39 | out_numb3 
clk_CNTB1 |  8                                38 | out_numb1 
clk_CNTB0 |  9                                37 | out_func2 
      GND | 10                                36 | out_func1 
 RESERVED | 11                                35 | VCC 
 RESERVED | 12         EPM7032LC44-6          34 | out_numb2 
 RESERVED | 13                                33 | out_func4 
 RESERVED | 14                                32 | out_func3 
      VCC | 15                                31 | out_func0 
 RESERVED | 16                                30 | GND 
 RESERVED | 17                                29 | flag_func 
          |_  18 19 20 21 22 23 24 25 26 27 28  _| 
            ------------------------------------ 
               R  R  R  R  G  V  R  R  R  o  f  
               E  E  E  E  N  C  E  E  E  u  l  
               S  S  S  S  D  C  S  S  S  t  a  
               E  E  E  E        E  E  E  _  g  
               R  R  R  R        R  R  R  n  _  
               V  V  V  V        V  V  V  u  n  
               E  E  E  E        E  E  E  m  u  
               D  D  D  D        D  D  D  b  m  
                                          0  b  


N.C. = No Connect, This pin has no internal connection to the device.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.



Device-Specific Information:                 c:\vhdl\disk\ch8\keyboard_dec.rpt
keyboard_dec

** RESOURCE USAGE **

                                                Shareable     External
Logic Array Block     Logic Cells   I/O Pins    Expanders   Interconnect

A:     LC1 - LC16     0/16(  0%)   6/16( 37%)   0/16(  0%)   0/36(  0%) 
B:    LC17 - LC32    13/16( 81%)  13/16( 81%)   0/16(  0%)  15/36( 41%) 


Total dedicated input pins used:                 1/4      ( 25%)
Total I/O pins used:                            19/32     ( 59%)
Total logic cells used:                         13/32     ( 40%)
Total shareable expanders used:                  0/32     (  0%)
Total Turbo logic cells used:                   13/32     ( 40%)
Total shareable expanders not available (n/a):   0/32     (  0%)
Average fan-in:                                  6.53
Total fan-in:                                    85

Total input pins required:                       7
Total output pins required:                     13
Total bidirectional pins required:               0
Total logic cells required:                     13
Total flipflops required:                       11
Total product terms required:                   28
Total logic cells lending parallel expanders:    0
Total shareable expanders in database:           0

Synthesized logic cells:                         0/  32   (  0%)



Device-Specific Information:                 c:\vhdl\disk\ch8\keyboard_dec.rpt
keyboard_dec

** INPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  43      -   -       INPUT  G            0      0   0    0    0    0    0  clk
   9    (6)  (A)      INPUT               0      0   0    0    0   10    0  clk_CNTB0
   8    (5)  (A)      INPUT               0      0   0    0    0   11    0  clk_CNTB1
   7    (4)  (A)      INPUT               0      0   0    0    0   11    0  key_in0
   6    (3)  (A)      INPUT               0      0   0    0    0   11    0  key_in1
   5    (2)  (A)      INPUT               0      0   0    0    0   11    0  key_in2
   4    (1)  (A)      INPUT               0      0   0    0    0   11    0  key_in3


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell
G = Global Source. Fan-out destinations counted here do not include destinations
that are driven using global routing resources. Refer to the Auto Global Signals,
Clock Signals, Clear Signals, Synchronous Load Signals, and Synchronous Clear Signals
Sections of this Report File for information on which signals' fan-outs are used as
Clock, Clear, Preset, Output Enable, and synchronous Load signals.


Device-Specific Information:                 c:\vhdl\disk\ch8\keyboard_dec.rpt
keyboard_dec

** OUTPUTS **

                                         Shareable
                                         Expanders     Fan-In    Fan-Out
 Pin     LC  LAB  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  29     27    B     OUTPUT      t        0      0   0    0    6    0    0  flag_func
  28     28    B     OUTPUT      t        0      0   0    0    3    0    0  flag_numb
  31     26    B         FF   +  t        0      0   0    6    0    0    0  out_func0 (:38)
  36     22    B         FF   +  t        0      0   0    6    0    1    0  out_func1 (:37)
  37     21    B         FF   +  t        0      0   0    6    0    1    0  out_func2 (:36)
  32     25    B         FF   +  t        0      0   0    6    0    1    0  out_func3 (:35)
  33     24    B         FF   +  t        0      0   0    6    0    1    0  out_func4 (:34)
  41     17    B         FF   +  t        0      0   0    6    0    1    0  out_func5 (:33)
  40     18    B         FF   +  t        0      0   0    6    0    1    0  out_func6 (:32)
  27     29    B         FF   +  t        0      0   0    6    0    0    0  out_numb0 (:31)
  38     20    B         FF   +  t        0      0   0    6    0    1    0  out_numb1 (:30)
  34     23    B         FF   +  t        0      0   0    6    0    1    0  out_numb2 (:29)
  39     19    B         FF   +  t        0      0   0    5    0    1    0  out_numb3 (:28)


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                 c:\vhdl\disk\ch8\keyboard_dec.rpt
keyboard_dec

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'B':

                                   Logic cells placed in LAB 'B'
        +------------------------- LC27 flag_func
        | +----------------------- LC28 flag_numb
        | | +--------------------- LC26 out_func0
        | | | +------------------- LC22 out_func1
        | | | | +----------------- LC21 out_func2
        | | | | | +--------------- LC25 out_func3
        | | | | | | +------------- LC24 out_func4
        | | | | | | | +----------- LC17 out_func5
        | | | | | | | | +--------- LC18 out_func6
        | | | | | | | | | +------- LC29 out_numb0
        | | | | | | | | | | +----- LC20 out_numb1
        | | | | | | | | | | | +--- LC23 out_numb2
        | | | | | | | | | | | | +- LC19 out_numb3
        | | | | | | | | | | | | | 
        | | | | | | | | | | | | |   Other LABs fed by signals

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