ch6_2_4.fit

《VHDL与数字电路设计》配套光盘,可以实际调用

-- MAX+plus II Compiler Fit File      
-- Version 9.23 3/19/99               
-- Compiled: 04/02/2000 13:21:02      

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "ch6_2_4a"
BEGIN

    DEVICE = "EPF8282ALC84-2";

    "A"                            : INPUT_PIN  = 73     ;
    "CP"                           : INPUT_PIN  = 12     ;
    "DIF"                          : OUTPUT_PIN = 62     ;
    "Q0"                           : OUTPUT_PIN = 27     ;
    "Q1"                           : OUTPUT_PIN = 58     ;
    "Q2"                           : OUTPUT_PIN = 60     ;
    "Q3"                           : OUTPUT_PIN = 56     ;
    "|LPM_ADD_SUB:40|addcore:adder|:55" : LOCATION   = LC6_B1 ;
    ":9"                           : LOCATION   = LC1_B1 ;  -- QN3
    ":10"                          : LOCATION   = LC5_B1 ;  -- QN2
    ":11"                          : LOCATION   = LC4_B1 ;  -- QN1
    ":12"                          : LOCATION   = LC3_B1 ;  -- QN0
    ":13"                          : LOCATION   = LC2_B2 ;  -- Q1~32
    ":14"                          : LOCATION   = LC3_B2 ;  -- Q2~34
    ":86"                          : LOCATION   = LC2_B1 ;
    ":105"                         : LOCATION   = LC1_B2 ;

END;

INTERNAL_INFO "ch6_2_4a"
BEGIN
	DEVICE = EPF8282ALC84-2;
    OD1P73  : LORAX = "1:FH1R1,PA14R1C1->LC2_B2|";
    OD0P12  : LORAX = "1:->LC1_B1,->LC5_B1,->LC4_B1,->LC3_B1,->LC2_B2,->LC3_B2|";
    LC1_B1  : LORAX = "1:G4R1->OH13R1P56|";
    LC5_B1  : LORAX = "1:G156R1->OH7R1P60|";
    LC4_B1  : LORAX = "1:G64R1->OH9R1P58|";
    LC3_B1  : LORAX = "1:G47R1->OH8R1P27|";
    LC2_B1  : LORAX = "1:G39R1,PA10R1C1->LC2_B2,->LC3_B2|";
    LC1_B2  : LORAX = "1:G16R1->OH3R1P62|2:PA13R1C0->LC1_B1,->LC5_B1,->LC4_B1,->LC3_B1||";
	LC6_B1  : LORAX2 = "X, X, LC3_B1, LC4_B1";
	LC1_B1  : LORAX2 = "LC6_B1, LC1_B1, LC5_B1, LC1_B2";
	LC5_B1  : LORAX2 = "LC5_B1, LC4_B1, LC3_B1, LC1_B2";
	LC4_B1  : LORAX2 = "X, LC4_B1, LC3_B1, LC1_B2";
	LC3_B1  : LORAX2 = "X, X, LC3_B1, LC1_B2";
	LC2_B2  : LORAX2 = "X, OD1P73, LC2_B1, LC2_B2";
	LC3_B2  : LORAX2 = "X, LC2_B1, LC3_B2, LC2_B2";
	LC2_B1  : LORAX2 = "LC1_B1, LC3_B1, LC5_B1, LC4_B1";
	LC1_B2  : LORAX2 = "X, X, LC3_B2, LC2_B2";
END;