ch6_4_1.fit

《VHDL与数字电路设计》配套光盘,可以实际调用

-- MAX+plus II Compiler Fit File      
-- Version 9.23 3/19/99               
-- Compiled: 04/03/2000 19:38:50      

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "ch6_4_1a"
BEGIN

    DEVICE = "EPF8282ALC84-2";

    "CP"                           : INPUT_PIN  = 12     ;
    "DIN"                          : INPUT_PIN  = 31     ;
    "DIR"                          : INPUT_PIN  = 73     ;
    "OP"                           : OUTPUT_PIN = 56     ;
    ":5"                           : LOCATION   = LC1_B2 ;  -- Q7
    ":6"                           : LOCATION   = LC7_B2 ;  -- Q6
    ":7"                           : LOCATION   = LC6_B2 ;  -- Q5
    ":8"                           : LOCATION   = LC8_B2 ;  -- Q4
    ":9"                           : LOCATION   = LC5_B2 ;  -- Q3
    ":10"                          : LOCATION   = LC3_B2 ;  -- Q2
    ":11"                          : LOCATION   = LC4_B2 ;  -- Q1
    ":12"                          : LOCATION   = LC2_B2 ;  -- Q0
    ":1142"                        : LOCATION   = LC1_B1 ;

END;

INTERNAL_INFO "ch6_4_1a"
BEGIN
	DEVICE = EPF8282ALC84-2;
    OD0P12  : LORAX = "1:->LC1_B2,->LC7_B2,->LC6_B2,->LC8_B2,->LC5_B2,->LC3_B2,->LC4_B2,->LC2_B2|";
    OD2P31  : LORAX = "1:FH2R1,PA11R1C1->LC1_B2,->LC2_B2|";
    OD1P73  : LORAX = "1:FH1R1|2:PA14R1C0->LC1_B1|,2:PA14R1C1->LC1_B2,->LC7_B2,->LC6_B2,->LC8_B2,->LC5_B2,->LC3_B2,->LC4_B2,->LC2_B2||";
    LC1_B2  : LORAX = "1:G16R1,PA13R1C0->LC1_B1|";
    LC2_B2  : LORAX = "1:G23R1,PA22R1C0->LC1_B1|";
    LC1_B1  : LORAX = "1:G4R1->OH13R1P56|";
	LC1_B2  : LORAX2 = "X, OD2P31, LC7_B2, OD1P73";
	LC7_B2  : LORAX2 = "X, LC6_B2, OD1P73, LC1_B2";
	LC6_B2  : LORAX2 = "X, LC7_B2, LC8_B2, OD1P73";
	LC8_B2  : LORAX2 = "X, LC6_B2, LC5_B2, OD1P73";
	LC5_B2  : LORAX2 = "X, LC8_B2, LC3_B2, OD1P73";
	LC3_B2  : LORAX2 = "X, LC5_B2, LC4_B2, OD1P73";
	LC4_B2  : LORAX2 = "X, LC3_B2, OD1P73, LC2_B2";
	LC2_B2  : LORAX2 = "X, OD2P31, LC4_B2, OD1P73";
	LC1_B1  : LORAX2 = "X, OD1P73, LC2_B2, LC1_B2";
END;