sel4.tdf

来自「各种VHDL的开发资料」· TDF 代码 · 共 19 行

SUBDESIGN sel4
(
  d1[3..0],d2[3..0],d3[3..0],d4[3..0],sel[2..0]:INPUT;
  q[3..0]: OUTPUT;
)

BEGIN
   CASE sel[] IS
      WHEN 0 => q[]=d1[];
      WHEN 1 => q[]=d1[];
      WHEN 2 => q[]=d2[];
      WHEN 3 => q[]=d2[];
      WHEN 4 => q[]=d3[];
      WHEN 5 => q[]=d3[];
      WHEN 6 => q[]=d4[];
      WHEN 7 => q[]=d4[];
   END CASE;
END;