📄 multiplier.map.summary
字号:
Analysis & Synthesis Status : Successful - Sat Jan 03 15:22:41 2009
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Web Edition
Revision Name : Multiplier
Top-level Entity Name : Multiplier
Family : Stratix II
Logic utilization : N/A
Combinational ALUTs : 25
Dedicated logic registers : 16
Total registers : 16
Total pins : 21
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -