sar10.h

带触摸按键的高端电磁炉设计 该方案采用CYPRESS的新器件CY8C22545,是一款专门针对中高端的家电触摸产品设计。除了集成触摸按键功能外

//*****************************************************************************
//*****************************************************************************
//  FILENAME: SAR10.h
//   Version: 1.0, Updated on 2008/12/13 at 11:0:50
//  Generated by PSoC Designer ???
//
//  DESCRIPTION: SAR10 User Module C Language interface file
//               for the 21x45/22x45 PSoC family of devices
//-----------------------------------------------------------------------------
//  Copyright (c) Cypress Semiconductor Corporation 2000-2008. All Rights Reserved.
//*****************************************************************************
//*****************************************************************************

#include <m8c.h>

#pragma fastcall16 SAR10_EnableInt
#pragma fastcall16 SAR10_DisableInt
#pragma fastcall16 SAR10_Start
#pragma fastcall16 SAR10_Stop
#pragma fastcall16 SAR10_Trigger
#pragma fastcall16 SAR10_fIsDataAvailable          // Read  SAR_CR0
#pragma fastcall16 SAR10_iGetData                  // Read  SAR_DH_REG and SAR_DL_REG 
#pragma fastcall16 SAR10_bGetDataMSB8              // Read SAR_DH_REG 
#pragma fastcall16 SAR10_SetADCChannel             // Write SAR_CR0_REG
#pragma fastcall16 SAR10_SetTriggerSrc             // Write SAR_CR1_REG
#pragma fastcall16 SAR10_EnableAutoTrigger         // Write SAR_CR1_REG
#pragma fastcall16 SAR10_SetClk                    // Write SAR_CR1_REG
#pragma fastcall16 SAR10_SetRunMode                // Write SAR_CR2_REG

//-------------------------------------------------
// Prototypes of the SAR10 API.
//-------------------------------------------------

extern void SAR10_EnableInt(void);
extern void SAR10_DisableInt(void);
extern void SAR10_Start(void);
extern void SAR10_Stop(void);
extern void SAR10_Trigger(void);
extern BYTE SAR10_fIsDataAvailable(void);
extern INT  SAR10_iGetData(void);
extern BYTE SAR10_bGetDataMSB8(void);
extern void SAR10_SetADCChannel(BYTE bChannel);
extern void SAR10_SetTriggerSrc(BYTE bSrc);
extern void SAR10_EnableAutoTrigger(BYTE bMode);
extern void SAR10_SetClk(BYTE bClkMode);
extern void SAR10_SetRunMode(BYTE bRunMode);

//--------------------------------------------------
// SAR10 channel selection definitions
//--------------------------------------------------
#define  SAR10_CHS_P00                                          (0x00)
#define  SAR10_CHS_P01                                          (0x08)
#define  SAR10_CHS_P02                                          (0x10)
#define  SAR10_CHS_P03                                          (0x18)
#define  SAR10_CHS_P04                                          (0x20)
#define  SAR10_CHS_P05                                          (0x28)
#define  SAR10_CHS_P06                                          (0x30)
#define  SAR10_CHS_P07                                          (0x38)
#define  SAR10_CHS_AMUXL                                        (0x60)
#define  SAR10_CHS_AMUXR                                        (0x68)

//--------------------------------------------------
// SAR10 trigger source definitions
//--------------------------------------------------
#define  SAR10_SRC_TGRL                                         (0x00)
#define  SAR10_SRC_TGRH                                         (0x10)
#define  SAR10_SRC_TGR16                                        (0x20)
#define  SAR10_SRC_TGRINCMP                                     (0x30)

//--------------------------------------------------
// SAR10 auto trigger definitions
//--------------------------------------------------
#define  SAR10_AUTOTGR_ENABLE                                   (0x01)
#define  SAR10_AUTOTGR_DISABLE                                  (0x00)

//--------------------------------------------------
// SAR10 clock selection definitions
//--------------------------------------------------
#define  SAR10_SYSCLK_2                                         (0x00)
#define  SAR10_SYSCLK_4                                         (0x02)
#define  SAR10_SYSCLK_6                                         (0x04)
#define  SAR10_SYSCLK_8                                         (0x06)
#define  SAR10_SYSCLK_12                                        (0x08)
#define  SAR10_SYSCLK_16                                        (0x0A)
#define  SAR10_SYSCLK_32                                        (0x0C)
#define  SAR10_SYSCLK_64                                        (0x0E)

//--------------------------------------------------
// SAR10 run mode selection definitions
//--------------------------------------------------
#define  SAR10_ONESHOT                                          (0x00)
#define  SAR10_FREERUN                                          (0x08)

//--------------------------------------------------
// Constants for SAR10 API's.
//--------------------------------------------------

#define SAR10_SAR_CR0_REG_START_BIT                             ( 0x01 )
#define SAR10_INT_MASK                                          ( 0x10 )
#define SAR10_CHN_SEL_MASK                                      ( 0x78 )
#define SAR10_TRG_SEL_MASK                                      ( 0x30 )
#define SAR10_ALIGN_EN_MASK                                     ( 0x01 )
#define SAR10_CLK_SEL_MASK                                      ( 0x0E )
#define SAR10_FREE_RUN_MASK                                     ( 0x08 )
#define SAR10_READY_MASK                                        ( 0x04 )
#define SAR10_SAR_CR0_REG_SW_TRIG_BIT                           ( 0x02 )

//-------------------------------------------------
// Register Addresses for SAR10
//-------------------------------------------------

#pragma ioport  SAR10_SAR_CR0_REG:  0x1a8                            //Control 0 register
BYTE            SAR10_SAR_CR0_REG;
#pragma ioport  SAR10_SAR_CR1_REG:  0x1a9                            //Control 1 register
BYTE            SAR10_SAR_CR1_REG;
#pragma ioport  SAR10_SAR_CR2_REG:  0x1aa                            //Control 2 register
BYTE            SAR10_SAR_CR2_REG;
#pragma ioport  SAR10_SAR_DH_REG:   0x06a                            //Data (MSB) register
BYTE            SAR10_SAR_DH_REG;
#pragma ioport  SAR10_SAR_DL_REG:   0x06b                            //Data (LSB) register
BYTE            SAR10_SAR_DL_REG; 

//-------------------------------------------------
// SAR10 Macro 'Functions'
//-------------------------------------------------

#define SAR10_Start_M \
   ( SAR10_SAR_CR0_REG |=  SAR10_SAR_CR0_REG_START_BIT )

#define SAR10_Stop_M  \
   ( SAR10_SAR_CR0_REG &= ~SAR10_SAR_CR0_REG_START_BIT )

#define SAR10_EnableInt_M   \
   M8C_EnableIntMask(  INT_MSK2, SAR10_INT_MASK )

#define SAR10_DisableInt_M  \
   M8C_DisableIntMask( INT_MSK2, SAR10_INT_MASK )


// end of file SAR10.h