sar10.inc

来自「带触摸按键的高端电磁炉设计 该方案采用CYPRESS的新器件CY8C22545」· INC 代码 · 共 109 行

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME: SAR10.inc
;;   Version: 1.0, Updated on 2008/12/13 at 11:0:50
;;  Generated by PSoC Designer ???
;;
;;  DESCRIPTION: Assembler declarations for the SAR10 user module interface
;;               for the 21x45/22x45 PSoC family of devices
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress Semiconductor Corporation 2000-2008. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************

include "m8c.inc"


;--------------------------------------------------
; Constants for SAR10 API's.
;--------------------------------------------------

SAR10_SAR_CR0_REG_START_BIT:                               equ 0x01    ; Control register start bit
SAR10_INT_MASK:                                            equ 0x10
SAR10_CHN_SEL_MASK:                                        equ 0x78
SAR10_TRG_SEL_MASK:                                        equ 0x30
SAR10_ALIGN_EN_MASK:                                       equ 0x01
SAR10_CLK_SEL_MASK:                                        equ 0x0E
SAR10_FREE_RUN_MASK:                                       equ 0x08
SAR10_READY_MASK:                                          equ 0x04
SAR10_SAR_CR0_REG_SW_TRIG_BIT:                             equ 0x02

;--------------------------------------------------
; SAR10 channel selection definitions
;--------------------------------------------------
SAR10_CHS_P00:                                             equ   (00h)
SAR10_CHS_P01:                                             equ   (08h)
SAR10_CHS_P02:                                             equ   (10h)
SAR10_CHS_P03:                                             equ   (18h)
SAR10_CHS_P04:                                             equ   (20h)
SAR10_CHS_P05:                                             equ   (28h)
SAR10_CHS_P06:                                             equ   (30h)
SAR10_CHS_P07:                                             equ   (38h)
SAR10_CHS_AMUXL:                                           equ   (60h)
SAR10_CHS_AMUXR:                                           equ   (68h)

;--------------------------------------------------
; SAR10 trigger source definitions
;--------------------------------------------------
SAR10_SRC_TGRL:                                            equ   (00h)
SAR10_SRC_TGRH:                                            equ   (10h)
SAR10_SRC_TGR16:                                           equ   (20h)
SAR10_SRC_TGRINCMP:                                        equ   (30h)

;--------------------------------------------------
; SAR10 auto trigger definitions
;--------------------------------------------------
SAR10_AUTOTGR_ENABLE:                                      equ   (01h)
SAR10_AUTOTGR_DISABLE:                                     equ   (00h)

;--------------------------------------------------
; SAR10 clock selection definitions
;--------------------------------------------------
SAR10_SYSCLK_2:                                            equ   (00h)
SAR10_SYSCLK_4:                                            equ   (02h)
SAR10_SYSCLK_6:                                            equ   (04h)
SAR10_SYSCLK_8:                                            equ   (06h)
SAR10_SYSCLK_12:                                           equ   (08h)
SAR10_SYSCLK_16:                                           equ   (0Ah)
SAR10_SYSCLK_32:                                           equ   (0Ch)
SAR10_SYSCLK_64:                                           equ   (0Eh)

;--------------------------------------------------
; SAR10 run mode selection definitions
;--------------------------------------------------
SAR10_ONESHOT:                                             equ   (00h)
SAR10_FREERUN:                                             equ   (08h)

;--------------------------------------------------
; Register Address Constants for SAR10
;--------------------------------------------------

SAR10_SAR_CR0_REG:                             equ 0xa8   ; SAR Control_0 register
SAR10_SAR_CR1_REG:                             equ 0xa9   ; SAR Control_1 register
SAR10_SAR_CR2_REG:                             equ 0xaa   ; SAR Control_2 register
SAR10_SAR_DH_REG:                              equ 0x6a    ; SAR Data (MSB) register
SAR10_SAR_DL_REG:                              equ 0x6b    ; SAR Data (LSB) register

;--------------------------------------------------
; SAR10 Macro 'Functions'
;--------------------------------------------------

   macro SAR10_Start_M
   or    reg[SAR10_SAR_CR0_REG],  SAR10_SAR_CR0_REG_START_BIT
   endm

   macro SAR10_Stop_M
   and   reg[SAR10_SAR_CR0_REG], ~SAR10_SAR_CR0_REG_START_BIT
   endm

   macro SAR10_EnableInt_M
   M8C_EnableIntMask INT_MSK2, SAR10_INT_MASK
   endm

   macro SAR10_DisableInt_M
   M8C_DisableIntMask INT_MSK2, SAR10_INT_MASK
   endm


; end of file SAR10.inc