📄 sar10.asm
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;;*****************************************************************************
;;*****************************************************************************
;; FILENAME: SAR10.asm
;; Version: 1.0, Updated on 2008/12/13 at 11:0:50
;; Generated by PSoC Designer ???
;;
;; DESCRIPTION: SAR10 User Module software implementation file
;; for the 21x45/22x45 PSoC family of devices
;;
;; NOTE: User Module APIs conform to the fastcall16 convention for marshalling
;; arguments and observe the associated "Registers are volatile" policy.
;; This means it is the caller's responsibility to preserve any values
;; in the X and A registers that are still needed after the API functions
;; returns. For Large Memory Model devices it is also the caller's
;; responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and
;; MVW_PP registers. Even though some of these registers may not be modified
;; now, there is no guarantee that will remain the case in future releases.
;;-----------------------------------------------------------------------------
;; Copyright (c) Cypress Semiconductor Corporation 2000-2008. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************
include "m8c.inc"
include "memory.inc"
include "SAR10.inc"
;-----------------------------------------------
; Global Symbols
;-----------------------------------------------
export SAR10_EnableInt
export _SAR10_EnableInt
export SAR10_DisableInt
export _SAR10_DisableInt
export SAR10_Start
export _SAR10_Start
export SAR10_Stop
export _SAR10_Stop
export SAR10_Trigger
export _SAR10_Trigger
export SAR10_fIsDataAvailable
export _SAR10_fIsDataAvailable
export SAR10_iGetData
export _SAR10_iGetData
export SAR10_bGetDataMSB8
export _SAR10_bGetDataMSB8
export SAR10_SetADCChannel
export _SAR10_SetADCChannel
export SAR10_SetTriggerSrc
export _SAR10_SetTriggerSrc
export SAR10_EnableAutoTrigger
export _SAR10_EnableAutoTrigger
export SAR10_SetClk
export _SAR10_SetClk
export SAR10_SetRunMode
export _SAR10_SetRunMode
AREA cookerv20_RAM (RAM,REL)
;-----------------------------------------------
; Constant Definitions
;-----------------------------------------------
;-----------------------------------------------
; Variable Allocation
;-----------------------------------------------
AREA UserModules (ROM, REL)
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_EnableInt
;
; DESCRIPTION:
; Enables the interrupt mode operation by setting the interrupt enable mask bit
; associated with this User Module. This function has no effect until and
; unless the global interrupts are enabled (for example by using the
; macro M8C_EnableGInt).
;-----------------------------------------------------------------------------
;
; ARGUMENTS: None.
; RETURNS: Nothing.
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_EnableInt:
_SAR10_EnableInt:
RAM_PROLOGUE RAM_USE_CLASS_1
SAR10_EnableInt_M
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_DisableInt
;
; DESCRIPTION:
; Disables the interrupt mode operation by clearing the interrupt enable
; mask bit associated with this User Module.
;-----------------------------------------------------------------------------
;
; ARGUMENTS: None
; RETURNS: Nothing
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_DisableInt:
_SAR10_DisableInt:
RAM_PROLOGUE RAM_USE_CLASS_1
SAR10_DisableInt_M
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_Start
;
; DESCRIPTION:
; Enables SAR operation.
; Set the ADC_EN bit in SAR_CR0 register
;-----------------------------------------------------------------------------
;
; ARGUMENTS: None
; RETURNS: Nothing
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_Start:
_SAR10_Start:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_SetBank1
SAR10_Start_M
M8C_SetBank0
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_Stop
;
; DESCRIPTION:
; Disables SAR operation
; Clear ADC_EN bit in SAR_CR0 register
;-----------------------------------------------------------------------------
;
; ARGUMENTS: None
; RETURNS: Nothing
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_Stop:
_SAR10_Stop:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_SetBank1
SAR10_Stop_M
M8C_SetBank0
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_Trigger
;
; DESCRIPTION:
; Trigger the SAR to sample for one time
; Set START/ONGOING bit in SAR_CR0 register
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS: Nothing
; RETURNS: Nothing
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_Trigger:
_SAR10_Trigger:
RAM_PROLOGUE RAM_USE_CLASS_1
M8C_SetBank1
or reg[SAR10_SAR_CR0_REG], SAR10_SAR_CR0_REG_SW_TRIG_BIT
M8C_SetBank0
RAM_EPILOGUE RAM_USE_CLASS_1
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_fIsDataAvailable
;
; DESCRIPTION:
; Checks the availability of sampled data.
; Get READY bit from SAR_CR0 register
;
;-----------------------------------------------------------------------------
;
; ARGUMENTS: None
; RETURNS: fastcall16 BYTE fIsDataAvailable (void)
; SIDE EFFECTS:
; The A and X registers may be modified by this or future implementations
; of this function. The same is true for all RAM page pointer registers in
; the Large Memory Model. When necessary, it is the calling function's
; responsibility to perserve their values across calls to fastcall16
; functions.
;
SAR10_fIsDataAvailable:
_SAR10_fIsDataAvailable:
RAM_PROLOGUE RAM_USE_CLASS_4
M8C_SetBank1
mov A,reg[SAR10_SAR_CR0_REG] ; Read value of SAR_CR0 register
M8C_SetBank0
and A,SAR10_READY_MASK ; Checks the availability of sampled data.
RAM_EPILOGUE RAM_USE_CLASS_4
ret
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
; FUNCTION NAME: SAR10_iGetData
;
; DESCRIPTION:
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