📄 controller.rpt
字号:
_EQ099 = _LC3_B7 & _LC4_B5
# !_LC4_B5 & _LC8_B7;
-- Node name is '~3408~1'
-- Equation name is '~3408~1', location is LC5_A22, type is buried.
-- synthesized logic cell
_LC5_A22 = LCELL( _EQ100);
_EQ100 = !_LC1_A22 & Num22 & Num23;
-- Node name is '~3408~2'
-- Equation name is '~3408~2', location is LC1_A23, type is buried.
-- synthesized logic cell
_LC1_A23 = LCELL( _EQ101);
_EQ101 = !_LC4_A23 & _LC5_A22 & _LC6_A16 & !Num21;
-- Node name is '~3408~3'
-- Equation name is '~3408~3', location is LC5_A23, type is buried.
-- synthesized logic cell
_LC5_A23 = LCELL( _EQ102);
_EQ102 = _LC2_A23 & !_LC4_A13 & _LC7_A22 & Num21;
-- Node name is '~3408~4'
-- Equation name is '~3408~4', location is LC6_A22, type is buried.
-- synthesized logic cell
_LC6_A22 = LCELL( _EQ103);
_EQ103 = !_LC1_A22 & _LC3_A10 & !Num21 & Num22;
-- Node name is ':3408'
-- Equation name is '_LC7_A16', type is buried
_LC7_A16 = LCELL( _EQ104);
_EQ104 = _LC4_A22 & !Num21 & Num24;
-- Node name is ':3426'
-- Equation name is '_LC3_A16', type is buried
!_LC3_A16 = _LC3_A16~NOT;
_LC3_A16~NOT = LCELL( _EQ105);
_EQ105 = Num21
# Num22;
-- Node name is ':3449'
-- Equation name is '_LC7_A22', type is buried
!_LC7_A22 = _LC7_A22~NOT;
_LC7_A22~NOT = LCELL( _EQ106);
_EQ106 = Num22
# Num23;
-- Node name is '~3469~1'
-- Equation name is '~3469~1', location is LC4_A16, type is buried.
-- synthesized logic cell
!_LC4_A16 = _LC4_A16~NOT;
_LC4_A16~NOT = LCELL( _EQ107);
_EQ107 = !_LC7_A22
# !Num24;
-- Node name is ':3469'
-- Equation name is '_LC6_A16', type is buried
_LC6_A16 = LCELL( _EQ108);
_EQ108 = !_LC3_A16 & Num23 & !Num24
# _LC7_A22 & Num24;
-- Node name is '~3615~1'
-- Equation name is '~3615~1', location is LC3_A10, type is buried.
-- synthesized logic cell
_LC3_A10 = LCELL( _EQ109);
_EQ109 = _LC2_A10 & Num23;
-- Node name is ':3780'
-- Equation name is '_LC4_A23', type is buried
!_LC4_A23 = _LC4_A23~NOT;
_LC4_A23~NOT = LCELL( _EQ110);
_EQ110 = !_LC7_A22
# !Num24
# !Num21;
-- Node name is '~3804~1'
-- Equation name is '~3804~1', location is LC1_A22, type is buried.
-- synthesized logic cell
!_LC1_A22 = _LC1_A22~NOT;
_LC1_A22~NOT = LCELL( _EQ111);
_EQ111 = !Num22
# !Num21
# !_LC2_A22 & !_LC3_A10;
-- Node name is '~3804~2'
-- Equation name is '~3804~2', location is LC6_A13, type is buried.
-- synthesized logic cell
_LC6_A13 = LCELL( _EQ112);
_EQ112 = _LC7_A22 & !Num21 & Num24;
-- Node name is '~3955~1'
-- Equation name is '~3955~1', location is LC2_A22, type is buried.
-- synthesized logic cell
!_LC2_A22 = _LC2_A22~NOT;
_LC2_A22~NOT = LCELL( _EQ113);
_EQ113 = Num20
# Num24
# !Num23;
-- Node name is '~3966~1'
-- Equation name is '~3966~1', location is LC3_A22, type is buried.
-- synthesized logic cell
_LC3_A22 = LCELL( _EQ114);
_EQ114 = Num20 & Num22 & !Num23 & !Num24;
-- Node name is ':3977'
-- Equation name is '_LC1_A24', type is buried
!_LC1_A24 = _LC1_A24~NOT;
_LC1_A24~NOT = LCELL( _EQ115);
_EQ115 = !Num21
# Num24
# !_LC4_A22;
-- Node name is '~3999~1'
-- Equation name is '~3999~1', location is LC4_A22, type is buried.
-- synthesized logic cell
_LC4_A22 = LCELL( _EQ116);
_EQ116 = !Num20 & Num22 & !Num23;
-- Node name is ':3999'
-- Equation name is '_LC3_A24', type is buried
!_LC3_A24 = _LC3_A24~NOT;
_LC3_A24~NOT = LCELL( _EQ117);
_EQ117 = !_LC4_A22
# Num21
# Num24;
-- Node name is ':4010'
-- Equation name is '_LC7_A23', type is buried
_LC7_A23 = LCELL( _EQ118);
_EQ118 = _LC2_A10 & _LC7_A22 & Num21;
-- Node name is ':4175'
-- Equation name is '_LC8_A22', type is buried
!_LC8_A22 = _LC8_A22~NOT;
_LC8_A22~NOT = LCELL( _EQ119);
_EQ119 = Num21
# Num22
# !_LC2_A22 & !_LC3_A10;
-- Node name is '~4199~1'
-- Equation name is '~4199~1', location is LC4_A13, type is buried.
-- synthesized logic cell
!_LC4_A13 = _LC4_A13~NOT;
_LC4_A13~NOT = LCELL( _EQ120);
_EQ120 = Num21
# !_LC3_A22 & !_LC4_A22
# !_LC3_A22 & Num24;
-- Node name is '~4199~2'
-- Equation name is '~4199~2', location is LC3_A13, type is buried.
-- synthesized logic cell
_LC3_A13 = LCELL( _EQ121);
_EQ121 = _LC3_A22 & Num21
# _LC4_A22 & Num21 & !Num24;
-- Node name is '~4249~1'
-- Equation name is '~4249~1', location is LC2_A10, type is buried.
-- synthesized logic cell
_LC2_A10 = LCELL( _EQ122);
_EQ122 = Num20 & !Num24;
-- Node name is ':4320'
-- Equation name is '_LC8_A16', type is buried
_LC8_A16 = LCELL( _EQ123);
_EQ123 = _LC6_A16 & !_LC7_A16;
-- Node name is ':4329'
-- Equation name is '_LC1_A13', type is buried
_LC1_A13 = LCELL( _EQ124);
_EQ124 = _LC4_A23 & _LC6_A16 & !_LC7_A16
# !_LC6_A16 & !_LC7_A16 & _LC8_A22;
-- Node name is ':4334'
-- Equation name is '_LC8_A13', type is buried
_LC8_A13 = LCELL( _EQ125);
_EQ125 = !_LC4_A23 & _LC6_A13 & _LC6_A16
# _LC1_A22 & !_LC4_A23 & _LC6_A16;
-- Node name is '~4335~1'
-- Equation name is '~4335~1', location is LC2_A23, type is buried.
-- synthesized logic cell
_LC2_A23 = LCELL( _EQ126);
_EQ126 = !_LC6_A16 & !_LC8_A22;
-- Node name is ':4335'
-- Equation name is '_LC7_A13', type is buried
_LC7_A13 = LCELL( _EQ127);
_EQ127 = _LC3_A13 & !_LC6_A16 & !_LC8_A22
# _LC4_A13 & !_LC6_A16 & !_LC8_A22;
-- Node name is ':4338'
-- Equation name is '_LC5_A13', type is buried
_LC5_A13 = LCELL( _EQ128);
_EQ128 = _LC7_A13 & !_LC7_A16
# !_LC7_A16 & _LC8_A13;
-- Node name is '~4347~1'
-- Equation name is '~4347~1', location is LC6_A23, type is buried.
-- synthesized logic cell
_LC6_A23 = LCELL( _EQ129);
_EQ129 = _LC1_A23 & !Num20 & !Num24
# _LC5_A23 & !Num20 & !Num24;
-- Node name is '~4347~2'
-- Equation name is '~4347~2', location is LC8_A23, type is buried.
-- synthesized logic cell
_LC8_A23 = LCELL( _EQ130);
_EQ130 = _LC2_A23 & _LC3_A13
# _LC2_A23 & !_LC4_A13 & _LC7_A23;
-- Node name is '~4347~3'
-- Equation name is '~4347~3', location is LC2_A13, type is buried.
-- synthesized logic cell
_LC2_A13 = LCELL( _EQ131);
_EQ131 = !_LC4_A23 & _LC6_A13 & _LC6_A16
# !_LC4_A23 & _LC6_A16 & _LC6_A22;
-- Node name is ':4347'
-- Equation name is '_LC3_A23', type is buried
_LC3_A23 = LCELL( _EQ132);
_EQ132 = _LC6_A23 & !_LC7_A16
# !_LC7_A16 & _LC8_A23
# _LC2_A13 & !_LC7_A16;
-- Node name is '~4356~1'
-- Equation name is '~4356~1', location is LC4_A24, type is buried.
-- synthesized logic cell
_LC4_A24 = LCELL( _EQ133);
_EQ133 = _LC2_A10 & !_LC3_A24 & _LC7_A22;
-- Node name is '~4356~2'
-- Equation name is '~4356~2', location is LC5_A24, type is buried.
-- synthesized logic cell
_LC5_A24 = LCELL( _EQ134);
_EQ134 = _LC3_A22 & Num21
# !_LC1_A24 & _LC3_A22
# !_LC1_A24 & _LC4_A24;
-- Node name is '~4356~3'
-- Equation name is '~4356~3', location is LC6_A24, type is buried.
-- synthesized logic cell
_LC6_A24 = LCELL( _EQ135);
_EQ135 = _LC3_A10 & _LC3_A16
# !_LC3_A16 & _LC5_A24
# !_LC2_A22 & _LC5_A24;
-- Node name is '~4356~4'
-- Equation name is '~4356~4', location is LC7_A24, type is buried.
-- synthesized logic cell
_LC7_A24 = LCELL( _EQ136);
_EQ136 = _LC3_A10 & Num22
# _LC3_A10 & Num21;
-- Node name is '~4356~5'
-- Equation name is '~4356~5', location is LC8_A24, type is buried.
-- synthesized logic cell
_LC8_A24 = LCELL( _EQ137);
_EQ137 = _LC4_A16 & Num20
# !_LC4_A16 & _LC7_A24
# _LC7_A24 & Num20;
-- Node name is ':4356'
-- Equation name is '_LC2_A24', type is buried
_LC2_A24 = LCELL( _EQ138);
_EQ138 = !_LC6_A16 & _LC6_A24 & !_LC7_A16
# _LC6_A16 & !_LC7_A16 & _LC8_A24;
-- Node name is ':4491'
-- Equation name is '_LC8_A6', type is buried
_LC8_A6 = LCELL( _EQ139);
_EQ139 = !Num31 & Num32;
-- Node name is ':4511'
-- Equation name is '_LC4_A6', type is buried
_LC4_A6 = LCELL( _EQ140);
_EQ140 = Num31 & !Num32;
-- Node name is ':4527'
-- Equation name is '_LC2_A6', type is buried
_LC2_A6 = LCELL( _EQ141);
_EQ141 = Num30 & !Num32
# Num30 & !Num31;
Project Information e:\travel\controller.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'ACEX1K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Au
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -