mux8.rpt

自己做的vhdl课程设计

a2       : INPUT;
d00      : INPUT;
d01      : INPUT;
d02      : INPUT;
d03      : INPUT;
d10      : INPUT;
d11      : INPUT;
d12      : INPUT;
d13      : INPUT;
d20      : INPUT;
d21      : INPUT;
d22      : INPUT;
d23      : INPUT;
d30      : INPUT;
d31      : INPUT;
d32      : INPUT;
d33      : INPUT;
d40      : INPUT;
d41      : INPUT;
d42      : INPUT;
d43      : INPUT;
d50      : INPUT;
d51      : INPUT;
d52      : INPUT;
d53      : INPUT;
d60      : INPUT;
d61      : INPUT;
d62      : INPUT;
d63      : INPUT;
d70      : INPUT;
d71      : INPUT;
d72      : INPUT;
d73      : INPUT;

-- Node name is 'y0' 
-- Equation name is 'y0', type is output 
y0       =  _LC1_B6;

-- Node name is 'y1' 
-- Equation name is 'y1', type is output 
y1       =  _LC2_B2;

-- Node name is 'y2' 
-- Equation name is 'y2', type is output 
y2       =  _LC1_B7;

-- Node name is 'y3' 
-- Equation name is 'y3', type is output 
y3       =  _LC1_B2;

-- Node name is ':213' 
-- Equation name is '_LC2_A8', type is buried 
_LC2_A8  = LCELL( _EQ001);
  _EQ001 = !a0 &  a1 &  a2;

-- Node name is ':216' 
-- Equation name is '_LC3_A1', type is buried 
_LC3_A1  = LCELL( _EQ002);
  _EQ002 =  d73 & !_LC2_A8
         #  d63 &  _LC2_A8;

-- Node name is ':223' 
-- Equation name is '_LC1_A9', type is buried 
!_LC1_A9 = _LC1_A9~NOT;
_LC1_A9~NOT = LCELL( _EQ003);
  _EQ003 =  a1
         # !a0
         # !a2;

-- Node name is ':226' 
-- Equation name is '_LC1_A1', type is buried 
_LC1_A1  = LCELL( _EQ004);
  _EQ004 =  d53 &  _LC1_A9
         # !_LC1_A9 &  _LC3_A1;

-- Node name is ':233' 
-- Equation name is '_LC3_A10', type is buried 
_LC3_A10 = LCELL( _EQ005);
  _EQ005 = !a0 & !a1 &  a2;

-- Node name is ':236' 
-- Equation name is '_LC5_A1', type is buried 
_LC5_A1  = LCELL( _EQ006);
  _EQ006 =  _LC1_A1 & !_LC3_A10
         #  d43 &  _LC3_A10;

-- Node name is ':243' 
-- Equation name is '_LC1_A5', type is buried 
_LC1_A5  = LCELL( _EQ007);
  _EQ007 =  a0 &  a1 & !a2;

-- Node name is ':246' 
-- Equation name is '_LC6_B2', type is buried 
_LC6_B2  = LCELL( _EQ008);
  _EQ008 = !_LC1_A5 &  _LC5_A1
         #  d33 &  _LC1_A5;

-- Node name is ':253' 
-- Equation name is '_LC1_B11', type is buried 
_LC1_B11 = LCELL( _EQ009);
  _EQ009 = !a0 &  a1 & !a2;

-- Node name is ':256' 
-- Equation name is '_LC7_B2', type is buried 
_LC7_B2  = LCELL( _EQ010);
  _EQ010 = !_LC1_B11 &  _LC6_B2
         #  d23 &  _LC1_B11;

-- Node name is ':263' 
-- Equation name is '_LC2_B12', type is buried 
_LC2_B12 = LCELL( _EQ011);
  _EQ011 =  a0 & !a1 & !a2;

-- Node name is ':266' 
-- Equation name is '_LC8_B2', type is buried 
_LC8_B2  = LCELL( _EQ012);
  _EQ012 = !_LC2_B12 &  _LC7_B2
         #  d13 &  _LC2_B12;

-- Node name is ':273' 
-- Equation name is '_LC7_B13', type is buried 
_LC7_B13 = LCELL( _EQ013);
  _EQ013 = !a0 & !a1 & !a2;

-- Node name is ':276' 
-- Equation name is '_LC1_B2', type is buried 
_LC1_B2  = LCELL( _EQ014);
  _EQ014 = !_LC7_B13 &  _LC8_B2
         #  d03 &  _LC7_B13;

-- Node name is ':282' 
-- Equation name is '_LC4_A1', type is buried 
_LC4_A1  = LCELL( _EQ015);
  _EQ015 =  d72 & !_LC2_A8
         #  d62 &  _LC2_A8;

-- Node name is ':285' 
-- Equation name is '_LC6_A1', type is buried 
_LC6_A1  = LCELL( _EQ016);
  _EQ016 =  d52 &  _LC1_A9
         # !_LC1_A9 &  _LC4_A1;

-- Node name is ':288' 
-- Equation name is '_LC7_A1', type is buried 
_LC7_A1  = LCELL( _EQ017);
  _EQ017 = !_LC3_A10 &  _LC6_A1
         #  d42 &  _LC3_A10;

-- Node name is ':291' 
-- Equation name is '_LC2_A1', type is buried 
_LC2_A1  = LCELL( _EQ018);
  _EQ018 = !_LC1_A5 &  _LC7_A1
         #  d32 &  _LC1_A5;

-- Node name is ':294' 
-- Equation name is '_LC2_B7', type is buried 
_LC2_B7  = LCELL( _EQ019);
  _EQ019 = !_LC1_B11 &  _LC2_A1
         #  d22 &  _LC1_B11;

-- Node name is ':297' 
-- Equation name is '_LC3_B7', type is buried 
_LC3_B7  = LCELL( _EQ020);
  _EQ020 =  _LC2_B7 & !_LC2_B12
         #  d12 &  _LC2_B12;

-- Node name is ':300' 
-- Equation name is '_LC1_B7', type is buried 
_LC1_B7  = LCELL( _EQ021);
  _EQ021 =  _LC3_B7 & !_LC7_B13
         #  d02 &  _LC7_B13;

-- Node name is ':306' 
-- Equation name is '_LC2_A4', type is buried 
_LC2_A4  = LCELL( _EQ022);
  _EQ022 =  d71 & !_LC2_A8
         #  d61 &  _LC2_A8;

-- Node name is ':309' 
-- Equation name is '_LC1_A4', type is buried 
_LC1_A4  = LCELL( _EQ023);
  _EQ023 =  d51 &  _LC1_A9
         # !_LC1_A9 &  _LC2_A4;

-- Node name is ':312' 
-- Equation name is '_LC4_A4', type is buried 
_LC4_A4  = LCELL( _EQ024);
  _EQ024 =  _LC1_A4 & !_LC3_A10
         #  d41 &  _LC3_A10;

-- Node name is ':315' 
-- Equation name is '_LC5_B2', type is buried 
_LC5_B2  = LCELL( _EQ025);
  _EQ025 = !_LC1_A5 &  _LC4_A4
         #  d31 &  _LC1_A5;

-- Node name is ':318' 
-- Equation name is '_LC3_B2', type is buried 
_LC3_B2  = LCELL( _EQ026);
  _EQ026 = !_LC1_B11 &  _LC5_B2
         #  d21 &  _LC1_B11;

-- Node name is ':321' 
-- Equation name is '_LC4_B2', type is buried 
_LC4_B2  = LCELL( _EQ027);
  _EQ027 = !_LC2_B12 &  _LC3_B2
         #  d11 &  _LC2_B12;

-- Node name is ':324' 
-- Equation name is '_LC2_B2', type is buried 
_LC2_B2  = LCELL( _EQ028);
  _EQ028 =  _LC4_B2 & !_LC7_B13
         #  d01 &  _LC7_B13;

-- Node name is ':330' 
-- Equation name is '_LC1_A3', type is buried 
_LC1_A3  = LCELL( _EQ029);
  _EQ029 =  d70 & !_LC2_A8
         #  d60 &  _LC2_A8;

-- Node name is ':333' 
-- Equation name is '_LC2_A3', type is buried 
_LC2_A3  = LCELL( _EQ030);
  _EQ030 =  d50 &  _LC1_A9
         #  _LC1_A3 & !_LC1_A9;

-- Node name is ':336' 
-- Equation name is '_LC3_A3', type is buried 
_LC3_A3  = LCELL( _EQ031);
  _EQ031 =  _LC2_A3 & !_LC3_A10
         #  d40 &  _LC3_A10;

-- Node name is ':339' 
-- Equation name is '_LC4_A3', type is buried 
_LC4_A3  = LCELL( _EQ032);
  _EQ032 = !_LC1_A5 &  _LC3_A3
         #  d30 &  _LC1_A5;

-- Node name is ':342' 
-- Equation name is '_LC2_B6', type is buried 
_LC2_B6  = LCELL( _EQ033);
  _EQ033 = !_LC1_B11 &  _LC4_A3
         #  d20 &  _LC1_B11;

-- Node name is ':345' 
-- Equation name is '_LC3_B6', type is buried 
_LC3_B6  = LCELL( _EQ034);
  _EQ034 =  _LC2_B6 & !_LC2_B12
         #  d10 &  _LC2_B12;

-- Node name is ':348' 
-- Equation name is '_LC1_B6', type is buried 
_LC1_B6  = LCELL( _EQ035);
  _EQ035 =  _LC3_B6 & !_LC7_B13
         #  d00 &  _LC7_B13;



Project Information                                         e:\travel\mux8.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX8000' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:00
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:00


Memory Allocated
-----------------

Peak memory allocated during compilation  = 8,832K