traffic.fit.summary

来自「Verilog HDL语言设计的交通灯设计」· SUMMARY 代码 · 共 13 行

Fitter Status : Successful - Tue Dec 30 23:22:27 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : traffic
Top-level Entity Name : traffic
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Final
Total logic elements : 67 / 5,980 ( 1 % )
Total pins : 26 / 185 ( 14 % )
Total virtual pins : 0
Total memory bits : 0 / 92,160 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )