printer1.rpt

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Project Information                           d:\maxplus2_10\vhdl\printer1.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 04/04/2007 21:00:55

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

printer1  EPM9320LC84-15   3        1        0      11      14          3  %

User Pins:                 3        1        0  



Project Information                           d:\maxplus2_10\vhdl\printer1.rpt

** FILE HIERARCHY **



|printer:1|
|printer:1|74193:20|
|printer:6|
|printer:6|74193:20|


Device-Specific Information:                  d:\maxplus2_10\vhdl\printer1.rpt
printer1

***** Logic for device 'printer1' compiled without errors.




Device: EPM9320LC84-15

Device Options:
    Turbo Bit                                    = ON
    Security Bit                                 = OFF
    User Code                                  = ffff
    MultiVolt I/O                              = OFF

              R  R  R  R  R     R  R  R  R        R  R  R  R     R  R  R  R  
              E  E  E  E  E     E  E  E  E        E  E  E  E     E  E  E  E  
              S  S  S  S  S     S  S  S  S        S  S  S  S     S  S  S  S  
              E  E  E  E  E     E  E  E  E  r     E  E  E  E  V  E  E  E  E  
              R  R  R  R  R     R  R  R  R  e     R  R  R  R  C  R  R  R  R  
              V  V  V  V  V  G  V  V  V  V  s     V  V  V  V  C  V  V  V  V  
              E  E  E  E  E  N  E  E  E  E  e  t  E  E  E  E  I  E  E  E  E  
              D  D  D  D  D  D  D  D  D  D  t  r  D  D  D  D  O  D  D  D  D  
            -----------------------------------------------------------------_ 
          /  11 10  9  8  7  6  5  4  3  2  1 84 83 82 81 80 79 78 77 76 75   | 
RESERVED | 12                                                              74 | RESERVED 
     clk | 13                                                              73 | RESERVED 
  VCCINT | 14                                                              72 | GND 
   VCCIO | 15                                                              71 | VCCINT 
RESERVED | 16                                                              70 | GND 
RESERVED | 17                                                              69 | RESERVED 
     GND | 18                                                              68 | RESERVED 
RESERVED | 19                                                              67 | GND 
RESERVED | 20                                                              66 | RESERVED 
  VCCINT | 21                                                              65 | RESERVED 
RESERVED | 22                        EPM9320LC84-15                        64 | VCCINT 
     rdy | 23                                                              63 | RESERVED 
     GND | 24                                                              62 | RESERVED 
     GND | 25                                                              61 | GND 
RESERVED | 26                                                              60 | VCCIO 
RESERVED | 27                                                              59 | RESERVED 
  VCCINT | 28                                                              58 | RESERVED 
    N.C. | 29                                                              57 | VCCINT 
    #TDO | 30                                                              56 | ^VPP 
RESERVED | 31                                                              55 | #TMS 
RESERVED | 32                                                              54 | RESERVED 
         |_  33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53  _| 
           ------------------------------------------------------------------ 
              R  R  R  R  V  R  R  R  R  #  #  R  R  R  R  G  R  R  R  R  R  
              E  E  E  E  C  E  E  E  E  T  T  E  E  E  E  N  E  E  E  E  E  
              S  S  S  S  C  S  S  S  S  D  C  S  S  S  S  D  S  S  S  S  S  
              E  E  E  E  I  E  E  E  E  I  K  E  E  E  E     E  E  E  E  E  
              R  R  R  R  O  R  R  R  R        R  R  R  R     R  R  R  R  R  
              V  V  V  V     V  V  V  V        V  V  V  V     V  V  V  V  V  
              E  E  E  E     E  E  E  E        E  E  E  E     E  E  E  E  E  
              D  D  D  D     D  D  D  D        D  D  D  D     D  D  D  D  D  


N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration.  JTAG pin stability prevents accidental loading of JTAG instructions.


Device-Specific Information:                  d:\maxplus2_10\vhdl\printer1.rpt
printer1

** RESOURCE USAGE **

Logic                Column       Row                                   
Array                Interconnect Interconnect         Clears/     External    Shareable
Block   Logic Cells  Driven       Driven       Clocks  Presets   Interconnect  Expanders
B1      11/16( 68%)   0/16(  0%)   1/16(  6%)    0/2    0/2       3/33(  9%)   14/16( 87%)  


Total dedicated input pins used:                 3/4      ( 75%)
Total I/O pins used:                             1/56     (  1%)
Total logic cells used:                         11/320    (  3%)
Total shareable expanders used:                 13/320    (  4%)
Total Turbo logic cells used:                   11/320    (  3%)
Total shareable expanders not available (n/a):   1/320    (  0%)
Average fan-in:                                  7.90
Total fan-in:                                    87

Total input pins required:                       3
Total input I/O cell registers required:         0
Total output pins required:                      1
Total output I/O cell registers required:        0
Total buried I/O cell registers required:        0
Total bidirectional pins required:               0
Total logic cells required:                     11
Total flipflops required:                        8
Total product terms required:                   48
Total logic cells lending parallel expanders:    0
Total shareable expanders in database:          13
Total packed registers required:                 0

Synthesized logic cells:                         0/ 320   (  0%)

Logic Cell Counts

Column:  01  02  03  04  05  Total
 A:      0   0   0   0   0      0
 B:     11   0   0   0   0     11
 C:      0   0   0   0   0      0
 D:      0   0   0   0   0      0

Total:  11   0   0   0   0     11



Device-Specific Information:                  d:\maxplus2_10\vhdl\printer1.rpt
printer1

** INPUTS **

                                               Shareable
                                               Expanders     Fan-In    Fan-Out
 Pin     LC   Row  Col  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  13      -    -    --      INPUT               0      0   0    0    0    0   11  clk
   1      -    -    --      INPUT               0      0   0    0    0    0    7  reset
  84      -    -    --      INPUT               0      0   0    0    0    0    5  tr


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                  d:\maxplus2_10\vhdl\printer1.rpt
printer1

** OUTPUTS **

                                               Shareable
                                               Expanders     Fan-In    Fan-Out
 Pin     LC   Row  Col  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK  Name
  23      -    B    --     OUTPUT               0      0   0    0    1    0    0  rdy


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                  d:\maxplus2_10\vhdl\printer1.rpt
printer1

** BURIED LOGIC **

                                               Shareable
                                               Expanders     Fan-In    Fan-Out
 IOC     LC   Row  Col  Primitive    Code   Total Shared n/a INP  FBK  OUT  FBK Name
   -     10    B    01        OR2      t !      0      0   0    3    4    0    9  |printer:1|:18
   -      4    B    01       TFFE      t        1      0   0    2    4    0    6  |printer:1|74193:20|QD (|printer:1|74193:20|:23)
   -      3    B    01       TFFE      t        1      0   0    2    3    0    7  |printer:1|74193:20|QC (|printer:1|74193:20|:24)
   -      2    B    01       TFFE      t        1      0   0    2    2    0    8  |printer:1|74193:20|QB (|printer:1|74193:20|:25)
   -      1    B    01       TFFE      t        1      0   0    2    1    0    9  |printer:1|74193:20|QA (|printer:1|74193:20|:26)
   -      9    B    01        OR2      t        0      0   0    2    5    1    1  |printer:6|rdy (|printer:6|:11)
   -     11    B    01        OR2      t !      1      0   1    2    6    0    5  |printer:6|:18
   -      5    B    01       TFFE      t        6      5   0    2    9    0    1  |printer:6|74193:20|QD (|printer:6|74193:20|:23)
   -      6    B    01       TFFE      t        6      5   0    2    8    0    2  |printer:6|74193:20|QC (|printer:6|74193:20|:24)
   -      7    B    01       TFFE      t        6      5   0    2    7    0    3  |printer:6|74193:20|QB (|printer:6|74193:20|:25)
   -      8    B    01       TFFE      t        6      5   0    2    6    0    4  |printer:6|74193:20|QA (|printer:6|74193:20|:26)


Code: