cpu.hif

cpu的vhdl设计实现加法减法乘法运算

HIF003
--
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	altram.tdf
	{
		altram [USE_LPM_FOR_AHDL_OPERATORS,WIDTH,AD_WIDTH,NUMWORDS,FILE=NO_FILE,REGISTERINPUTMODE=DEFAULT,USE_EAB=ON,DEVICE_FAMILY] [aglobal.inc,lpm_mux.inc,lpm_decode.inc,memmodes.inc]
		{
			11 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=16,AD_WIDTH=8,NUMWORDS=256,FILE=NO_FILE,REGISTERINPUTMODE=DEFAULT,USE_EAB=ON,DEVICE_FAMILY=FLEX10K] [Q15,Q14,Q13,Q12,Q11,Q10,Q9,Q8,Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,WE,Data15,Data14,Data13,Data12,Data11,Data10,Data9,Data8,Data7,Data6,Data5,Data4,Data3,Data2,Data1,Data0,Address7,Address6,Address5,Address4,Address3,Address2,Address1,Address0];
		}
	}
	altrom.tdf
	{
		altrom [USE_LPM_FOR_AHDL_OPERATORS,WIDTH,AD_WIDTH,NUMWORDS,FILE,REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY] [aglobal.inc,lpm_mux.inc,lpm_decode.inc,memmodes.inc]
		{
			8 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=32,AD_WIDTH=8,NUMWORDS=256,FILE=mul4_rom.mif,REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10K] [Q31,Q30,Q29,Q28,Q27,Q26,Q25,Q24,Q23,Q22,Q21,Q20,Q19,Q18,Q17,Q16,Q15,Q14,Q13,Q12,Q11,Q10,Q9,Q8,Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,Address7,Address6,Address5,Address4,Address3,Address2,Address1,Address0];
		}
	}
	lpm_ram_dq.tdf
	{
		lpm_ram_dq [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_WIDTHAD,LPM_NUMWORDS,LPM_INDATA=REGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_OUTDATA=REGISTERED,LPM_FILE=NO_FILE,DEVICE_FAMILY] [aglobal.inc,lpm_decode.inc,lpm_mux.inc,altram.inc]
		{
			10 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=16,LPM_WIDTHAD=8,LPM_INDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_OUTDATA=UNREGISTERED,LPM_FILE=NO_FILE,DEVICE_FAMILY=FLEX10K] [q0,q1,q2,q3,q4,q5,q6,q7,q8,q9,q10,q11,q12,q13,q14,q15,we,address0,address1,address2,address3,address4,address5,address6,address7,data0,data1,data2,data3,data4,data5,data6,data7,data8,data9,data10,data11,data12,data13,data14,data15];
		}
	}
	altshift.tdf
	{
		altshift [USE_LPM_FOR_AHDL_OPERATORS,WIDTH=4,DEPTH=0] []
		{
			16 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=16,DEPTH=0] [result15,result14,result13,result12,result11,result10,result9,result8,result7,result6,result5,result4,result3,result2,result1,result0,data15,data14,data13,data12,data11,data10,data9,data8,data7,data6,data5,data4,data3,data2,data1,data0];
			5 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,DEPTH=0] [result0,data0];
			4 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=8,DEPTH=0] [result7,result6,result5,result4,result3,result2,result1,result0,data7,data6,data5,data4,data3,data2,data1,data0];
		}
	}
	addcore.tdf
	{
		addcore [USE_LPM_FOR_AHDL_OPERATORS,width,CONSTANT_CIN,CARRY_CHAIN,CARRY_CHAIN_LENGTH,DEVICE_FAMILY] [aglobal.inc,addcore.inc]
		{
			15 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=16,CONSTANT_CIN=0,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K] [result15,result14,result13,result12,result11,result10,result9,result8,result7,result6,result5,result4,result3,result2,result1,result0,dataa15,dataa14,dataa13,dataa12,dataa11,dataa10,dataa9,dataa8,dataa7,dataa6,dataa5,dataa4,dataa3,dataa2,dataa1,dataa0,datab15,datab14,datab13,datab12,datab11,datab10,datab9,datab8,datab7,datab6,datab5,datab4,datab3,datab2,datab1,datab0,cin];
			3 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=8,CONSTANT_CIN=0,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K] [result7,result6,result5,result4,result3,result2,result1,result0,dataa7,dataa6,dataa5,dataa4,dataa3,dataa2,dataa1,dataa0,datab7,datab6,datab5,datab4,datab3,datab2,datab1,datab0,cin];
		}
	}
	lpm_rom.tdf
	{
		lpm_rom [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_WIDTHAD,LPM_NUMWORDS,LPM_ADDRESS_CONTROL=REGISTERED,LPM_OUTDATA=REGISTERED,LPM_FILE,DEVICE_FAMILY] []
		{
			7 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=32,LPM_WIDTHAD=8,LPM_NUMWORDS=256,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_OUTDATA=UNREGISTERED,LPM_FILE=mul4_rom.mif,DEVICE_FAMILY=FLEX10K] [q0,q1,q2,q3,q4,q5,q6,q7,q8,q9,q10,q11,q12,q13,q14,q15,q16,q17,q18,q19,q20,q21,q22,q23,q24,q25,q26,q27,q28,q29,q30,q31,address0,address1,address2,address3,address4,address5,address6,address7];
			6 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=32,LPM_WIDTHAD=8,LPM_NUMWORDS=256,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_OUTDATA=UNREGISTERED,DEVICE_FAMILY=FLEX10K] [q0,q1,q2,q3,q4,q5,q6,q7,q8,q9,q10,q11,q12,q13,q14,q15,q16,q17,q18,q19,q20,q21,q22,q23,q24,q25,q26,q27,q28,q29,q30,q31,address0,address1,address2,address3,address4,address5,address6,address7];
		}
	}
	lpm_add_sub.tdf
	{
		lpm_add_sub [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY,STYLE] [aglobal.inc,altshift.inc,bypassff.inc,look_add.inc,addcore.inc,lpm_add_sub.inc]
		{
			14 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=16,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K,STYLE=NORMAL] [RESULT15,RESULT14,RESULT13,RESULT12,RESULT11,RESULT10,RESULT9,RESULT8,RESULT7,RESULT6,RESULT5,RESULT4,RESULT3,RESULT2,RESULT1,RESULT0,CIN,DATAB15,DATAB14,DATAB13,DATAB12,DATAB11,DATAB10,DATAB9,DATAB8,DATAB7,DATAB6,DATAB5,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,DATAA15,DATAA14,DATAA13,DATAA12,DATAA11,DATAA10,DATAA9,DATAA8,DATAA7,DATAA6,DATAA5,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0];
			2 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=8,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K,STYLE=NORMAL] [RESULT7,RESULT6,RESULT5,RESULT4,RESULT3,RESULT2,RESULT1,RESULT0,CIN,DATAB7,DATAB6,DATAB5,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,DATAA7,DATAA6,DATAA5,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0];
		}
	}
	branchlogic.vhd
	{
		branchlogic [] [U1147235.DLS,U7449008.DLS,U2043679.DLS,U9092257.DLS,U5125632.DLS]
		{
			20 [] [];
		}
	}
	acc_alu.vhd
	{
		acc_alu [] [U1147235.DLS,U7449008.DLS,U2043679.DLS,U9092257.DLS,U5125632.DLS]
		{
			19 [] [];
		}
	}
	mbr.vhd
	{
		mbr [] [U1147235.DLS,U7449008.DLS,U2043679.DLS]
		{
			1 [] [];
		}
	}
	br.vhd
	{
		br [] [U1147235.DLS,U7449008.DLS,U2043679.DLS]
		{
			9 [] [];
		}
	}
	ir.vhd
	{
		ir [] [U1147235.DLS,U7449008.DLS,U2043679.DLS]
		{
			12 [] [];
		}
	}
	mar.vhd
	{
		mar [] [U1147235.DLS,U7449008.DLS,U2043679.DLS]
		{
			13 [] [];
		}
	}
	pc.vhd
	{
		pc [] [U1147235.DLS,U7449008.DLS,U2043679.DLS,U9092257.DLS,U5125632.DLS]
		{
			17 [] [];
		}
	}
	car.vhd
	{
		car [] [U1147235.DLS,U7449008.DLS,U2043679.DLS,U9092257.DLS,U5125632.DLS]
		{
			18 [] [];
		}
	}
	cpu.gdf
	{
		cpu [] []
		{
			0 [] [];
		}
	}
}
TREE
{
	cpu::(0,0):(0): cpu.gdf
	{
		branchlogic:20:(0,0):(47): branchlogic.vhd
		{
			lpm_add_sub:2:(23,10):(170): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(119,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(111,carry_ext_latency_ffs): altshift.tdf;
				altshift:4:(222,2):(89,result_ext_latency_ffs): altshift.tdf;
				addcore:3:(212,4):(58,adder): addcore.tdf;
			}
		}
		acc_alu:19:(0,0):(45): acc_alu.vhd
		{
			lpm_add_sub:14:(23,9):(656): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(183,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(175,carry_ext_latency_ffs): altshift.tdf;
				altshift:16:(222,2):(137,result_ext_latency_ffs): altshift.tdf;
				addcore:15:(212,4):(82,adder): addcore.tdf;
			}
			lpm_add_sub:14:(20,9):(440): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(183,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(175,carry_ext_latency_ffs): altshift.tdf;
				altshift:16:(222,2):(137,result_ext_latency_ffs): altshift.tdf;
				addcore:15:(212,4):(82,adder): addcore.tdf;
			}
		}
		car:18:(0,0):(43): car.vhd
		{
			lpm_add_sub:2:(21,9):(188): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(119,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(111,carry_ext_latency_ffs): altshift.tdf;
				altshift:4:(222,2):(89,result_ext_latency_ffs): altshift.tdf;
				addcore:3:(212,4):(58,adder): addcore.tdf;
			}
		}
		pc:17:(0,0):(42): pc.vhd
		{
			lpm_add_sub:2:(21,9):(188): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(119,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(111,carry_ext_latency_ffs): altshift.tdf;
				altshift:4:(222,2):(89,result_ext_latency_ffs): altshift.tdf;
				addcore:3:(212,4):(58,adder): addcore.tdf;
			}
		}
		mar:13:(0,0):(30): mar.vhd;
		ir:12:(0,0):(26): ir.vhd;
		br:9:(0,0):(22): br.vhd;
		mbr:1:(0,0):(21): mbr.vhd;
		lpm_ram_dq:10:(0,0):(6): lpm_ram_dq.tdf
		{
			altram:11:(86,5):(70,sram): altram.tdf;
		}
		lpm_rom:7:(0,0):(3): lpm_rom.tdf
		{
			altrom:8:(63,3):(70,srom): altrom.tdf;
		}
	}
}