📄 acc_alu.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.0 9/14/2000
-- Compiled: 05/15/2007 19:53:37
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "acc_alu"
BEGIN
DEVICE = "EPF10K10LC84-3";
"add" : INPUT_PIN = 44 ;
"br0" : INPUT_PIN = 36 ;
"br1" : INPUT_PIN = 37 ;
"br2" : INPUT_PIN = 27 ;
"br3" : INPUT_PIN = 5 ;
"br4" : INPUT_PIN = 9 ;
"br5" : INPUT_PIN = 11 ;
"br6" : INPUT_PIN = 83 ;
"br7" : INPUT_PIN = 59 ;
"br8" : INPUT_PIN = 53 ;
"br9" : INPUT_PIN = 48 ;
"br10" : INPUT_PIN = 65 ;
"br11" : INPUT_PIN = 23 ;
"br12" : INPUT_PIN = 67 ;
"br13" : INPUT_PIN = 10 ;
"br14" : INPUT_PIN = 25 ;
"br15" : INPUT_PIN = 66 ;
"clk" : INPUT_PIN = 1 ;
"logic_and" : INPUT_PIN = 2 ;
"logic_not" : INPUT_PIN = 35 ;
"logic_or" : INPUT_PIN = 42 ;
"reset" : INPUT_PIN = 84 ;
"shiftl" : INPUT_PIN = 38 ;
"shiftr" : INPUT_PIN = 3 ;
"sl_in" : INPUT_PIN = 39 ;
"sr_in" : INPUT_PIN = 64 ;
"sub" : INPUT_PIN = 43 ;
"acc_is0" : OUTPUT_PIN = 16 ;
"acc0" : OUTPUT_PIN = 24 ;
"acc1" : OUTPUT_PIN = 29 ;
"acc2" : OUTPUT_PIN = 30 ;
"acc3" : OUTPUT_PIN = 28 ;
"acc4" : OUTPUT_PIN = 58 ;
"acc5" : OUTPUT_PIN = 62 ;
"acc6" : OUTPUT_PIN = 22 ;
"acc7" : OUTPUT_PIN = 61 ;
"acc8" : OUTPUT_PIN = 60 ;
"acc9" : OUTPUT_PIN = 21 ;
"acc10" : OUTPUT_PIN = 18 ;
"acc11" : OUTPUT_PIN = 17 ;
"acc12" : OUTPUT_PIN = 7 ;
"acc13" : OUTPUT_PIN = 19 ;
"acc14" : OUTPUT_PIN = 8 ;
"acc15" : OUTPUT_PIN = 6 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry1" : LOCATION = LC1_C12;
"|LPM_ADD_SUB:440|addcore:adder|pcarry2" : LOCATION = LC5_C12;
"|LPM_ADD_SUB:440|addcore:adder|pcarry3" : LOCATION = LC2_C8 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry4" : LOCATION = LC3_C5 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry5" : LOCATION = LC4_C11;
"|LPM_ADD_SUB:440|addcore:adder|pcarry6" : LOCATION = LC4_C3 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry7" : LOCATION = LC1_C19;
"|LPM_ADD_SUB:440|addcore:adder|pcarry8" : LOCATION = LC2_C20;
"|LPM_ADD_SUB:440|addcore:adder|pcarry9" : LOCATION = LC1_C10;
"|LPM_ADD_SUB:440|addcore:adder|pcarry10" : LOCATION = LC1_B2 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry11" : LOCATION = LC1_B7 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry12" : LOCATION = LC7_B7 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry13" : LOCATION = LC4_B6 ;
"|LPM_ADD_SUB:440|addcore:adder|pcarry14" : LOCATION = LC4_B5 ;
"|LPM_ADD_SUB:440|addcore:adder|:178" : LOCATION = LC1_C4 ;
"|LPM_ADD_SUB:440|addcore:adder|:179" : LOCATION = LC3_C12;
"|LPM_ADD_SUB:440|addcore:adder|:180" : LOCATION = LC1_C1 ;
"|LPM_ADD_SUB:440|addcore:adder|:181" : LOCATION = LC1_C5 ;
"|LPM_ADD_SUB:440|addcore:adder|:182" : LOCATION = LC2_C11;
"|LPM_ADD_SUB:440|addcore:adder|:183" : LOCATION = LC1_C3 ;
"|LPM_ADD_SUB:440|addcore:adder|:184" : LOCATION = LC2_C19;
"|LPM_ADD_SUB:440|addcore:adder|:185" : LOCATION = LC3_C20;
"|LPM_ADD_SUB:440|addcore:adder|:186" : LOCATION = LC3_C10;
"|LPM_ADD_SUB:440|addcore:adder|:187" : LOCATION = LC2_B2 ;
"|LPM_ADD_SUB:440|addcore:adder|:188" : LOCATION = LC1_B12;
"|LPM_ADD_SUB:440|addcore:adder|:189" : LOCATION = LC2_B7 ;
"|LPM_ADD_SUB:440|addcore:adder|:190" : LOCATION = LC7_B6 ;
"|LPM_ADD_SUB:440|addcore:adder|:191" : LOCATION = LC1_B5 ;
"|LPM_ADD_SUB:440|addcore:adder|:192" : LOCATION = LC1_B9 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry1" : LOCATION = LC5_C4 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry2" : LOCATION = LC1_C8 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry3" : LOCATION = LC5_C8 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry4" : LOCATION = LC7_C5 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry5" : LOCATION = LC8_C11;
"|LPM_ADD_SUB:656|addcore:adder|pcarry6" : LOCATION = LC8_C3 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry7" : LOCATION = LC4_C19;
"|LPM_ADD_SUB:656|addcore:adder|pcarry8" : LOCATION = LC5_C20;
"|LPM_ADD_SUB:656|addcore:adder|pcarry9" : LOCATION = LC2_C10;
"|LPM_ADD_SUB:656|addcore:adder|pcarry10" : LOCATION = LC3_B2 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry11" : LOCATION = LC2_B12;
"|LPM_ADD_SUB:656|addcore:adder|pcarry12" : LOCATION = LC1_B6 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry13" : LOCATION = LC3_B6 ;
"|LPM_ADD_SUB:656|addcore:adder|pcarry14" : LOCATION = LC5_B5 ;
"|LPM_ADD_SUB:656|addcore:adder|~178~1" : LOCATION = LC4_C4 ;
"|LPM_ADD_SUB:656|addcore:adder|:179" : LOCATION = LC6_C12;
"|LPM_ADD_SUB:656|addcore:adder|:180" : LOCATION = LC3_C8 ;
"|LPM_ADD_SUB:656|addcore:adder|:181" : LOCATION = LC5_C5 ;
"|LPM_ADD_SUB:656|addcore:adder|:182" : LOCATION = LC5_C11;
"|LPM_ADD_SUB:656|addcore:adder|:183" : LOCATION = LC5_C3 ;
"|LPM_ADD_SUB:656|addcore:adder|:184" : LOCATION = LC6_C19;
"|LPM_ADD_SUB:656|addcore:adder|:185" : LOCATION = LC6_C20;
"|LPM_ADD_SUB:656|addcore:adder|:186" : LOCATION = LC6_C10;
"|LPM_ADD_SUB:656|addcore:adder|:187" : LOCATION = LC6_B2 ;
"|LPM_ADD_SUB:656|addcore:adder|:188" : LOCATION = LC5_B12;
"|LPM_ADD_SUB:656|addcore:adder|:189" : LOCATION = LC4_B7 ;
"|LPM_ADD_SUB:656|addcore:adder|:190" : LOCATION = LC6_B6 ;
"|LPM_ADD_SUB:656|addcore:adder|:191" : LOCATION = LC3_B5 ;
"|LPM_ADD_SUB:656|addcore:adder|:192" : LOCATION = LC3_B9 ;
":29" : LOCATION = LC8_B3 ;
":31" : LOCATION = LC1_B3 ;
":33" : LOCATION = LC7_B3 ;
":35" : LOCATION = LC6_B4 ;
":37" : LOCATION = LC2_B4 ;
":39" : LOCATION = LC8_B4 ;
":41" : LOCATION = LC1_C9 ;
":43" : LOCATION = LC4_C9 ;
":45" : LOCATION = LC3_C9 ;
":47" : LOCATION = LC2_C7 ;
":49" : LOCATION = LC1_C7 ;
":51" : LOCATION = LC7_C7 ;
":53" : LOCATION = LC2_C2 ;
":55" : LOCATION = LC7_C2 ;
":57" : LOCATION = LC8_C6 ;
":59" : LOCATION = LC6_C6 ;
":482" : LOCATION = LC2_B9 ;
":488" : LOCATION = LC2_B5 ;
":494" : LOCATION = LC6_B1 ;
":500" : LOCATION = LC3_B7 ;
":506" : LOCATION = LC3_B12;
":512" : LOCATION = LC4_B2 ;
":518" : LOCATION = LC5_C10;
":524" : LOCATION = LC4_C20;
":530" : LOCATION = LC3_C19;
":536" : LOCATION = LC3_C3 ;
":542" : LOCATION = LC3_C11;
":548" : LOCATION = LC2_C5 ;
":554" : LOCATION = LC8_C1 ;
":560" : LOCATION = LC4_C12;
":566" : LOCATION = LC2_C4 ;
":572" : LOCATION = LC1_B1 ;
":698" : LOCATION = LC5_B9 ;
":704" : LOCATION = LC6_B5 ;
":710" : LOCATION = LC4_B1 ;
":716" : LOCATION = LC5_B7 ;
":722" : LOCATION = LC6_B12;
":728" : LOCATION = LC7_B2 ;
":734" : LOCATION = LC7_C10;
":740" : LOCATION = LC7_C20;
":746" : LOCATION = LC7_C19;
":752" : LOCATION = LC6_C3 ;
":758" : LOCATION = LC6_C11;
":764" : LOCATION = LC6_C5 ;
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