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📄 cpu.fit

📁 cpu的vhdl设计实现加法减法乘法运算
💻 FIT
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-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 05/16/2007 08:39:27      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "cpu"
BEGIN

    DEVICE = "EPF10K20TC144-3";

    "clk"                          : INPUT_PIN  = 55     ;
    "c0"                           : OUTPUT_PIN = 80     ;
    "c1"                           : OUTPUT_PIN = 32     ;
    "c2"                           : OUTPUT_PIN = 33     ;
    "c3"                           : OUTPUT_PIN = 79     ;
    "c4"                           : OUTPUT_PIN = 30     ;
    "c5"                           : OUTPUT_PIN = 7      ;
    "c6"                           : OUTPUT_PIN = 144    ;
    "c7"                           : OUTPUT_PIN = 100    ;
    "c8"                           : OUTPUT_PIN = 102    ;
    "c9"                           : OUTPUT_PIN = 12     ;
    "c10"                          : OUTPUT_PIN = 13     ;
    "c11"                          : OUTPUT_PIN = 101    ;
    "c12"                          : OUTPUT_PIN = 9      ;
    "c13"                          : OUTPUT_PIN = 92     ;
    "c14"                          : OUTPUT_PIN = 8      ;
    "c15"                          : OUTPUT_PIN = 97     ;
    "c16"                          : OUTPUT_PIN = 87     ;
    "c17"                          : OUTPUT_PIN = 91     ;
    "c18"                          : OUTPUT_PIN = 88     ;
    "c19"                          : OUTPUT_PIN = 90     ;
    "c20"                          : OUTPUT_PIN = 14     ;
    "c21"                          : OUTPUT_PIN = 27     ;
    "c22"                          : OUTPUT_PIN = 86     ;
    "c23"                          : OUTPUT_PIN = 29     ;
    "c24"                          : OUTPUT_PIN = 19     ;
    "c25"                          : OUTPUT_PIN = 78     ;
    "c26"                          : OUTPUT_PIN = 21     ;
    "c27"                          : OUTPUT_PIN = 18     ;
    "c28"                          : OUTPUT_PIN = 23     ;
    "c29"                          : OUTPUT_PIN = 22     ;
    "c30"                          : OUTPUT_PIN = 98     ;
    "c31"                          : OUTPUT_PIN = 20     ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry1" : LOCATION   = LC2_A16;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry2" : LOCATION   = LC4_A21;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry3" : LOCATION   = LC1_A2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry4" : LOCATION   = LC8_A12;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry5" : LOCATION   = LC2_C4 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry6" : LOCATION   = LC1_C8 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry7" : LOCATION   = LC7_C5 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry8" : LOCATION   = LC4_F2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry9" : LOCATION   = LC3_F19;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry10" : LOCATION   = LC2_F21;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry11" : LOCATION   = LC2_F23;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry12" : LOCATION   = LC1_F23;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry13" : LOCATION   = LC2_F16;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|pcarry14" : LOCATION   = LC4_F18;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:178" : LOCATION   = LC3_A16;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:179" : LOCATION   = LC3_A21;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:180" : LOCATION   = LC8_A2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:181" : LOCATION   = LC3_A12;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:182" : LOCATION   = LC4_C4 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:183" : LOCATION   = LC3_C8 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:184" : LOCATION   = LC1_C5 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:185" : LOCATION   = LC2_F2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:186" : LOCATION   = LC2_F19;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:187" : LOCATION   = LC1_F21;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:188" : LOCATION   = LC1_F22;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:189" : LOCATION   = LC3_F23;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:190" : LOCATION   = LC8_F16;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:191" : LOCATION   = LC1_F18;
    "|ACC_ALU:45|LPM_ADD_SUB:440|addcore:adder|:192" : LOCATION   = LC3_F24;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry1" : LOCATION   = LC5_A16;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry2" : LOCATION   = LC5_A21;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry3" : LOCATION   = LC4_A2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry4" : LOCATION   = LC4_A12;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry5" : LOCATION   = LC8_C4 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry6" : LOCATION   = LC4_C8 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry7" : LOCATION   = LC4_C5 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry8" : LOCATION   = LC6_F2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry9" : LOCATION   = LC8_F19;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry10" : LOCATION   = LC3_F21;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry11" : LOCATION   = LC8_F22;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry12" : LOCATION   = LC1_F15;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry13" : LOCATION   = LC4_F15;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|pcarry14" : LOCATION   = LC7_F18;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|~178~1" : LOCATION   = LC6_A16;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:179" : LOCATION   = LC2_A21;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:180" : LOCATION   = LC5_A2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:181" : LOCATION   = LC1_A12;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:182" : LOCATION   = LC1_C4 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:183" : LOCATION   = LC6_C8 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:184" : LOCATION   = LC3_C5 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:185" : LOCATION   = LC5_F2 ;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:186" : LOCATION   = LC5_F19;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:187" : LOCATION   = LC5_F21;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:188" : LOCATION   = LC4_F22;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:189" : LOCATION   = LC6_F23;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:190" : LOCATION   = LC2_F15;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:191" : LOCATION   = LC3_F18;
    "|ACC_ALU:45|LPM_ADD_SUB:656|addcore:adder|:192" : LOCATION   = LC5_F24;
    "|ACC_ALU:45|:29"              : LOCATION   = LC8_F17;
    "|ACC_ALU:45|:31"              : LOCATION   = LC4_F17;
    "|ACC_ALU:45|:33"              : LOCATION   = LC2_F8 ;
    "|ACC_ALU:45|:35"              : LOCATION   = LC6_F14;
    "|ACC_ALU:45|:37"              : LOCATION   = LC3_F13;
    "|ACC_ALU:45|:39"              : LOCATION   = LC2_F13;
    "|ACC_ALU:45|:41"              : LOCATION   = LC1_F13;
    "|ACC_ALU:45|:43"              : LOCATION   = LC2_F10;
    "|ACC_ALU:45|:45"              : LOCATION   = LC1_F10;
    "|ACC_ALU:45|:47"              : LOCATION   = LC1_C6 ;
    "|ACC_ALU:45|:49"              : LOCATION   = LC3_A7 ;
    "|ACC_ALU:45|:51"              : LOCATION   = LC1_A7 ;
    "|ACC_ALU:45|:53"              : LOCATION   = LC5_A7 ;
    "|ACC_ALU:45|:55"              : LOCATION   = LC2_A7 ;
    "|ACC_ALU:45|:57"              : LOCATION   = LC2_A18;
    "|ACC_ALU:45|:59"              : LOCATION   = LC4_A18;
    "|ACC_ALU:45|:482"             : LOCATION   = LC4_F24;
    "|ACC_ALU:45|:488"             : LOCATION   = LC2_F18;
    "|ACC_ALU:45|:494"             : LOCATION   = LC5_F16;
    "|ACC_ALU:45|:500"             : LOCATION   = LC4_F23;
    "|ACC_ALU:45|:506"             : LOCATION   = LC2_F22;
    "|ACC_ALU:45|:512"             : LOCATION   = LC4_F21;
    "|ACC_ALU:45|:518"             : LOCATION   = LC4_F19;
    "|ACC_ALU:45|:524"             : LOCATION   = LC3_F2 ;
    "|ACC_ALU:45|:530"             : LOCATION   = LC2_C5 ;
    "|ACC_ALU:45|:536"             : LOCATION   = LC5_C8 ;
    "|ACC_ALU:45|:542"             : LOCATION   = LC5_C4 ;
    "|ACC_ALU:45|:548"             : LOCATION   = LC5_A12;
    "|ACC_ALU:45|:554"             : LOCATION   = LC8_A10;
    "|ACC_ALU:45|:560"             : LOCATION   = LC6_A21;
    "|ACC_ALU:45|:566"             : LOCATION   = LC4_A16;
    "|ACC_ALU:45|:572"             : LOCATION   = LC4_A23;
    "|ACC_ALU:45|:698"             : LOCATION   = LC6_F24;
    "|ACC_ALU:45|:704"             : LOCATION   = LC5_F18;
    "|ACC_ALU:45|:710"             : LOCATION   = LC3_F15;
    "|ACC_ALU:45|:716"             : LOCATION   = LC7_F23;
    "|ACC_ALU:45|:722"             : LOCATION   = LC5_F22;
    "|ACC_ALU:45|:728"             : LOCATION   = LC7_F21;
    "|ACC_ALU:45|:734"             : LOCATION   = LC6_F19;
    "|ACC_ALU:45|:740"             : LOCATION   = LC7_F2 ;
    "|ACC_ALU:45|:746"             : LOCATION   = LC5_C5 ;
    "|ACC_ALU:45|:752"             : LOCATION   = LC7_C8 ;
    "|ACC_ALU:45|:758"             : LOCATION   = LC6_C4 ;
    "|ACC_ALU:45|:764"             : LOCATION   = LC6_A12;
    "|ACC_ALU:45|:770"             : LOCATION   = LC1_A10;
    "|ACC_ALU:45|:776"             : LOCATION   = LC7_A21;
    "|ACC_ALU:45|:782"             : LOCATION   = LC7_A16;
    "|ACC_ALU:45|:788"             : LOCATION   = LC1_A18;
    "|ACC_ALU:45|:929"             : LOCATION   = LC7_F24;
    "|ACC_ALU:45|:935"             : LOCATION   = LC8_F18;
    "|ACC_ALU:45|:941"             : LOCATION   = LC5_F15;
    "|ACC_ALU:45|:947"             : LOCATION   = LC8_F23;
    "|ACC_ALU:45|:953"             : LOCATION   = LC6_F22;

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