📄 light.vhd
字号:
---------------------------------------------------------------------------------------------------
--*************************************************************************************************
-- CreateDate : 2007-07-12
-- ModifData : 2007-07-12
-- Description : Frequency
-- Author : Explorer01
-- Version : V1.0
--*************************************************************************************************
---------------------------------------------------------------------------------------------------
-- VHDL library Declarations
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.std_logic_unsigned.ALL;
---------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------
-- The Entity Declarations
ENTITY Light IS
PORT(
Period1mS: IN std_logic;
light: BUFFER std_logic_vector(7 DOWNTO 0)
);
END Light;
---------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------
-- The Architecture of Entity Declarations
ARCHITECTURE Behavioral OF Light IS
CONSTANT len : integer := 7;
SIGNAL banner : std_logic := '0';
SIGNAL clk, clk1, clk2: std_logic;
BEGIN
clk<=(clk1 AND banner) OR (clk2 AND NOT banner);
------------------------------------------------------------------------------
-- Clock
PROCESS( Period1mS )
VARIABLE Count : STD_LOGIC_VECTOR(7 DOWNTO 0);
BEGIN
------------------------------------
--Period: 1/4S (11111001: 249)
IF( Period1mS'EVENT AND Period1mS='1' ) THEN
IF( Count>"11111001" ) THEN Count := "00000000";
ELSE Count := Count + 1;
END IF;
clk1 <= Count(7);
END IF;
END PROCESS;
------------------------------------------------------------------------------
--
PROCESS( clk1 )
BEGIN
IF( clk1'event AND clk1='1' )THEN
clk2 <= NOT clk2;
END IF;
END PROCESS;
------------------------------------------------------------------------------
--
PROCESS( clk )
VARIABLE flag: bit_vector(2 downto 0):="000";
BEGIN
if clk'event and clk='1' then
if flag="000" then
light<='1' & light(len downto 1);
if light(1)='1' then
flag:="001";
end if;
elsif flag="001" then
light<=light(len-1 downto 0) & '0';
if light(6)='0' then
flag:="010";
end if;
elsif flag="010" then
light(len downto 4)<=light(len-1 downto 4)&'1';
light(len-4 downto 0)<='1'&light(len-4 downto 1);
if light(1)='1' then
flag:="011";
end if;
elsif flag="011" then
light(len downto 4)<='0'&light(len downto 5);
light(len-4 downto 0)<=light(len-5 downto 0)&'0';
if light(2)='0' then
flag:="100";
end if;
elsif flag="100" then
light(len downto 4)<='1'&light(len downto 5);
light(len-4 downto 0)<='1'&light(len-4 downto 1);
if light(1)='1' then
flag:="101";
end if;
elsif flag="101" then
light<="00000000";
flag:="110";
elsif flag="110" then
banner<=not banner;
flag:="000";
end if;
end if;
end process;
end Behavioral;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -