adc.tan.qmsg

利用EDA

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Full Version " "Info: Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 06 12:46:29 2005 " "Info: Processing started: Wed Apr 06 12:46:29 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --import_settings_files=off --export_settings_files=off DAC -c ADC --timing_analysis_only " "Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off DAC -c ADC --timing_analysis_only" {  } {  } 0}
{ "Warning" "WTAN_FOUND_COMB_LATCHES" "" "Warning: Timing Analysis found one or more latches implemented as combinational loops" { { "Warning" "WTAN_COMB_LATCH_NODE" "ledcs\$latch " "Warning: Node \"ledcs\$latch\" is a latch" {  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "DBUS\[0\]\$latch " "Info: Node \"DBUS\[0\]\$latch\"" {  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "AD_VALUE\[4\] " "Info: Node \"AD_VALUE\[4\]\"" {  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "DBUS\[1\]\$latch " "Info: Node \"DBUS\[1\]\$latch\"" {  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "1 " "Info: Found combinational loop of 1 nodes" { { "Info" "ITAN_SCC_NODE" "DBUS\[2\]\$latch " "Info: Node \"DBUS\[2\]\$latch\"" {  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}  } { { "DAC.vhd" "" { Text "C:/CVTSOPC/example/DAC/DAC.vhd" 30 -1 0 } }  } 0}