dac.qsf

利用EDA

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		DAC_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.2 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:47:17  APRIL 06, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VHDL_FILE DAC.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_41 -to CS
set_location_assignment PIN_29 -to CLK
set_location_assignment PIN_183 -to DBUS[0]
set_location_assignment PIN_184 -to DBUS[1]
set_location_assignment PIN_185 -to DBUS[2]
set_location_assignment PIN_186 -to DBUS[3]
set_location_assignment PIN_187 -to DBUS[4]
set_location_assignment PIN_188 -to DBUS[5]
set_location_assignment PIN_193 -to DBUS[6]
set_location_assignment PIN_194 -to DBUS[7]
set_location_assignment PIN_43 -to RD
set_location_assignment PIN_44 -to WR
set_location_assignment PIN_196 -to ledcs
set_location_assignment PIN_240 -to nRESET
set_location_assignment PIN_19 -to P13
set_location_assignment PIN_39 -to RAMCS

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY DAC

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[1]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[2]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[3]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[4]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[5]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[7]
set_instance_assignment -name IO_STANDARD LVCMOS -to DBUS[6]
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVCMOS

# Assembler Assignments
# =====================
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL 1

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF